DS3173 Maxim Integrated, DS3173 Datasheet - Page 210

• Manufacturer Part Number: DS3173
• Description: Network Controller & Processor ICs Triple DS3/E3 Single Chip Transceiver
• Manufacturer: Maxim Integrated

Specifications of DS3173

• Part # Aliases: 90-31730-000

13 JTAG INFORMATION
13.1 JTAG Description
This device supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional public
instructions included are HIGHZ, CLAMP, and IDCODE. The device contains the following items, which meet the
requirements set by the IEEE 1149.1 Standard Test Access Port (TAP) and Boundary Scan Architecture:
The Test Access Port has the necessary interface pins, namely JTCLK, JTDI, JTDO, and JTMS, and the optional
JTRST input. Details on these pins can be found in Section 8. Refer to IEEE 1149.1-1990, IEEE 1149.1a-1993, and
IEEE 1149.1b-1994 for details about the Boundary Scan Architecture and the Test Access Port.
Figure 13-1. JTAG Block Diagram
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
10K
JTDI
10K
JTMS
Register
Register
Bypass
Register
Register
Controller
Instruction
Identification
Boundary Scan
Test Access Port
JTCLK
210
10K
JTRST
Select
Tri-State
Mux
JTDO