Z8523L16VEG ZiLOG, Z8523L16VEG Datasheet - Page 2

• Manufacturer Part Number: Z8523L16VEG
• Description: Network Controller & Processor ICs 16MHz ESCC XTEMP 3.3V
• Manufacturer: ZiLOG

Specifications of Z8523L16VEG

• Rohs: yes
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V

KEY FEATURES
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FULL FEATURE CHANNELS
ENCODING SUPPORTED
PROTOCOLS SUPPORTED
Serial Communication Controllers (SCC)
DATA COMMUNICATION PERIPHERAL SOLUTIONS
SCC Detailed Feature Set
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Enhanced Serial Communications Controller (ESCC)
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Universal Serial Controller (USC) Z16C30
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Integrated Universal Serial Controller (IUSC) Z16C32
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Full Duplex Channels
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Encoding Supported
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Protocols Supported
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Clock Speeds: 8, 10, 16 and 20 MHz available
Synchronous Mode CRC Generation and Checking (CRC-16 or CRC-CCITT)
Local Loopback and Auto Echo Modes
Enhanced DMA Support
Some original NMOS SCC products are still offered; please refer to our website at www.Zilog.com for
further product details.
All of the SCC features as above, plus:
Improvements that reduce CPU overhead
Deeper FIFO’s: 4-byte transmit, and 8-byte receive FIFO
SDLC packet handling improvements
Low voltage version (3.0 to 3.6V) available
Two independent, 0 to 10Mbps, full-duplex channels
2 BRGs and 1 DPLL per channel
32-byte data FIFO’s for each receiver and transmitter
DMA interface with separate request and acknowledge
Same protocols supported as noted in the SCC feature set
Single full-duplex, 0 to 20 Mbps channel
2 BRG and 1 DPLL
2 full-capacity 20MHz DMA channels, each with 32-bit addressing and 16-bit data transfers
32-byte data FIFO’s for each receiver and transmitter
Same protocols supported as noted in the SCC feature set
Up to 4.1 Mbit/sec
Separate Crystal Oscillator
Baud Rate Generator
Digital Phase-Locked Loop for Clock Recovery
NRZ
NRZI
Manchester
FM Data Encoding
SDLC/HDLC
T1 Digital Trunk
CLASSIC SOLUTIONS
PB022701-0409
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