93LC56C-I/P Microchip Technology, 93LC56C-I/P Datasheet - Page 8

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93LC56C-I/P

Manufacturer Part Number
93LC56C-I/P
Description
IC EEPROM 2KBIT 3MHZ 8DIP
Manufacturer
Microchip Technology
Datasheets

Specifications of 93LC56C-I/P

Memory Size
2K (256 x 8 or 128 x 16)
Package / Case
8-DIP (0.300", 7.62mm)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz, 3MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
128 K x 16 or 256 x 8
Interface Type
2-Wire
Maximum Clock Frequency
2 MHz
Access Time
6 ms
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
0.5 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Memory Configuration
256 X 8, 128 X 16
Clock Frequency
3MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
93LC56C-I/PR
93LC56C-I/PR
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.6
The 93XX56A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWEN instruction is executed, program-
ming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device.
FIGURE 2-5:
FIGURE 2-6:
2.7
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-7:
DS21794B-page 8
CLK
CLK
CS
DO
CS
DI
CLK
DI
CS
DI
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
READ
HIGH-Z
1
1
1
EWDS TIMING
EWEN TIMING
READ TIMING
1
0
0
0
0
0
An
0
1
•••
0
A0
1
0
Dx
X
X
•••
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is indepen-
dent of both the EWEN and EWDS instructions.
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (T
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
•••
•••
D0
Dx
X
X
•••
T
T
CSL
CSL
PD
). Sequential read is possible when
D0
 2003 Microchip Technology Inc.
Dx
•••
D0

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