89H24NT6AG2ZBHLG8 IDT, 89H24NT6AG2ZBHLG8 Datasheet - Page 7

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89H24NT6AG2ZBHLG8

Manufacturer Part Number
89H24NT6AG2ZBHLG8
Description
Peripheral Drivers & Components - PCIs
Manufacturer
IDT
Datasheet

Specifications of 89H24NT6AG2ZBHLG8

Rohs
yes
Part # Aliases
IDT89H24NT6AG2ZBHLG8
SSMBADDR[2,1]
PE22RN[0]
PE23RN[0]
MSMBDAT
PE21TN[0]
PE21TP[0]
PE22RP[0]
PE22TN[0]
PE22TP[0]
PE23RP[0]
PE23TN[0]
PE23TP[0]
MSMBCLK
SSMBDAT
SSMBCLK
Signal
Signal
GCLKN[1:0]
GCLKP[1:0]
P08CLKN
P08CLKP
P16CLKN
P16CLKP
Signal
Type
Type
I/O
I/O
I/O
I/O
O
O
O
Type
I
I
I
I
I
I
Table 2 PCI Express Interface Pins (Part 3 of 3)
PCI Express Port 21 Serial Data Transmit. Differential PCI Express transmit pair for
port 21.
PCI Express Port 22 Serial Data Receive. Differential PCI Express receive pair for
port 22.
PCI Express Port 22 Serial Data Transmit. Differential PCI Express transmit pair for
port 22.
PCI Express Port 23 Serial Data Receive. Differential PCI Express receive pair for
port 23.
PCI Express Port 23 Serial Data Transmit. Differential PCI Express transmit pair for
port 23.
Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the
master SMBus. It is active and generating the clock only when the EEPROM or I/O
Expanders are being accessed.
Master SMBus Data. This bidirectional signal is used for data on the master SMBus.
Slave SMBus Address. These pins determine the SMBus address to which the slave
SMBus interface responds.
Slave SMBus Clock. This bidirectional signal is used to synchronize transfers on the
slave SMBus.
Slave SMBus Data. This bidirectional signal is used for data on the slave SMBus.
Global Reference Clock. Differential reference clock input pairs. This
clock is used as the reference clock by on-chip PLLs to generate the clocks
required for the system logic. The frequency of the differential reference
clock is determined by the GCLKFSEL signal.
Note: Both pairs of the Global Reference Clocks must be connected to and
derived from the same clock source. Refer to the Overview section of
Chapter 2 in the PES24NT24G2 User Manual for additional details.
Port Reference Clock. Differential reference clock pair associated with
port 8.
Port Reference Clock. Differential reference clock pair associated with
port 16.
Table 3 Reference Clock Pins
Table 4 SMBus Interface Pins
7 of 35
Name/Description
Name/Description
Name/Description
April 16, 2013

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