MAX8734AEEI+TG104 Maxim Integrated, MAX8734AEEI+TG104 Datasheet - Page 22
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MAX8734AEEI+TG104
Manufacturer Part Number
MAX8734AEEI+TG104
Description
Current & Power Monitors & Regulators High-Efficiency Quad-Output Main Power-Supply Controllers for Notebook Computers
Manufacturer
Maxim Integrated
Datasheet
1.MAX8734AEEIG104.pdf
(33 pages)
Specifications of MAX8734AEEI+TG104
Product
Power Monitors
Supply Voltage - Max
24 V
Supply Voltage - Min
4.5 V
Operating Temperature Range
- 40 C to + 85 C
Accuracy
1.50%
Input Voltage Range
4.5 V to 24 V
Supply Current
50 uA
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
high-side MOSFETs at the expense of efficiency, without
degrading the turn-off time (Figure 10).
Adaptive dead-time circuits monitor the DL_ and DH_
drivers and prevent either FET from turning on until the
other is fully off. This algorithm allows operation without
shoot-through with a wide range of MOSFETs, minimiz-
ing delays and maintaining efficiency. There must be
low-resistance, low-inductance paths from the gate dri-
vers to the MOSFET gates for the adaptive dead-time cir-
cuit to work properly. Otherwise, the sense circuitry
interprets the MOSFET gate as “off” when there is actual-
ly charge left on the gate. Use very short, wide traces
measuring 10 to 20 squares (50 mils to 100 mils wide if
the MOSFET is 1in from the device).
Power-on reset (POR) occurs when V+ rises above
approximately 2.4V, resetting the undervoltage, over-
voltage, and thermal-shutdown fault latches. LDO5
undervoltage-lockout (UVLO) circuitry inhibits switching
when LDO5 is below 4V (typ). DL_ is low if PRO is dis-
abled; DL_ is high if PRO is enabled. The output volt-
ages begin to ramp up once V
(typ) UVLO threshold and REF is in regulation. The
internal digital soft-start timer begins to ramp up the
maximum-allowed current limit during startup. The
1.7ms ramp occurs in five steps: 20%, 40%, 60%, 80%,
and 100%.
When LD05 falls below its 4V (typ) UVLO threshold,
DH_ and DL_ are immediately forced low, and the out-
puts are high impedance. REF is turned off when V
falls below 3.25V (typ). DL_ is forced high again when
V
The PGOOD comparator continuously monitors both out-
put voltages for undervoltage conditions. PGOOD is
actively held low in shutdown, standby, and soft-start.
PGOOD releases and digital soft-start terminates when
both outputs reach the error-comparator threshold.
PGOOD goes low if EITHER output turns off or is 10%
below its nominal regulation point. PGOOD is a true
open-drain output. Note that PGOOD is independent of
the state of PRO.
The MAX8732A/MAX8733A/MAX8734A provide
over/undervoltage fault protection. Drive PRO low to
activate fault protection. Drive PRO high to disable fault
protection. Once activated, the devices continuously
monitor for both undervoltage and overvoltage conditions.
22
CC
______________________________________________________________________________________
falls below its 1V (typ) POR threshold.
POR, UVLO, and Internal Digital
Power-Good Output (PGOOD)
CC
Fault Protection
exceeds its 3.25V
Soft-Start
CC
When the output voltage is 11% above the set voltage,
the overvoltage fault protection activates. The synchro-
nous rectifier turns on 100% and the high-side MOSFET
turns off. This rapidly discharges the output capacitors,
decreasing the output voltage. The output voltage may
dip below ground. For loads that cannot tolerate a neg-
ative voltage, place a power Schottky diode across the
output to act as a reverse-polarity clamp. In practical
applications, there is a fuse between the power source
(battery) and the external high-side switches. If the
overvoltage condition is caused by a short in the high-
side switch, turning the synchronous rectifier on 100%
creates an electrical short between the battery and
GND, blowing the fuse and disconnecting the battery
from the output. Once an overvoltage fault condition is
set, it can only be reset by toggling SHDN, ON_, or
cycling V+ (POR).
When the output voltage is 30% below the set voltage for
over 22ms (undervoltage shutdown blanking time), the
undervoltage fault protection activates. Both SMPSs stop
switching. The two outputs start to discharge (see the
Discharge Mode (Soft-Stop) section). When the output
voltage drops to 0.3V, the synchronous rectifiers turn on,
clamping the outputs to GND. Toggle SHDN or ON_, or
cycle V+ (POR) to clear the undervoltage fault latch.
The MAX8732A/MAX8733A/MAX8734A have thermal
shutdown to protect the devices from overheating.
Thermal shutdown occurs when the die temperature
exceeds +160°C. All internal circuitry shuts down during
thermal shutdown. The MAX8732A/MAX8733A/
MAX8734A may trigger thermal shutdown if LDO_ is not
bootstrapped from OUT_ while applying a high input
voltage on V+ and drawing the maximum current
(including short circuit) from LDO_. Even if LDO_ is boot-
strapped from OUT_, overloading the LDO_ causes
large power dissipation on the bootstrap switches, which
may result in thermal shutdown. Cycling SHDN, ON3,
ON5, or a V+ (POR) ends the thermal-shutdown state.
When PRO is low and a transition to standby or shut-
down mode occurs, or the output undervoltage fault
latch is set, the outputs discharge to GND through an
internal 12Ω switch, until the output voltages decrease
to 0.3V. The reference remains active to provide an
accurate threshold and to provide overvoltage protec-
tion. When both SMPS outputs discharge to 0.3V, the
DL_ synchronous rectifier drivers are forced high. The
Discharge Mode (Soft-Stop)
Undervoltage Protection
Overvoltage Protection
Thermal Protection