24VL024/P Microchip Technology, 24VL024/P Datasheet - Page 11

IC EEPROM 2KBIT 400KHZ 8DIP

24VL024/P

Manufacturer Part Number
24VL024/P
Description
IC EEPROM 2KBIT 400KHZ 8DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of 24VL024/P

Memory Size
2K (256 x 8)
Package / Case
8-DIP (0.300", 7.62mm)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.5 V ~ 3.6 V
Operating Temperature
-20°C ~ 85°C
Organization
256 K x 8
Interface Type
2-Wire
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 20 C
Operating Supply Voltage
1.8 V , 2.5 V , 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
8.0
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
The
counter that maintains the address of the last word
accessed, internally incremented by one. Therefore, if
the previous read access was to address n, the next
current address read operation would access data from
address n + 1. Upon receipt of the slave address with
the R/W bit set to ‘1’, the 24VL024/24VL025 issues an
acknowledge and transmits the 8-bit data word. The
master will not acknowledge the transfer, but does
generate a Stop condition and the 24VL024/24VL025
discontinues transmission (Figure 8-1).
8.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
24VL024/24VL025 as part of a write operation.
FIGURE 8-1:
© 2009 Microchip Technology Inc.
24VL024/24VL025
READ OPERATIONS
Current Address Read
Random Read
CURRENT ADDRESS READ
Bus Activity
Master
SDA Line
Bus Activity
contains
an
S
A
R
T
T
S
address
Control
Byte
C
A
K
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. The master then issues
the control byte again but with the R/W bit set to a ‘1’.
The
acknowledge and transmits the eight-bit data word.
The master will not acknowledge the transfer, but does
generate a Stop condition and the 24VL024/24VL025
discontinues transmission (Figure 8-2). After this
command, the internal address counter will point to the
address location following the one that was just read.
8.3
Sequential reads are initiated in the same way as a
random read except that after the 24VL024/24VL025
transmits the first data byte, the master issues an
acknowledge as opposed to a Stop condition in a
random read. This directs the 24VL024 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
To provide sequential reads, the 24VL024/24VL025
contains an internal Address Pointer which is
incremented by one at the completion of each
operation. This Address Pointer allows the entire
memory contents to be serially read during one
operation. The
automatically roll over from address FFh to address
00h.
Data
24VL024/24VL025
24VL024/24VL025
Sequential Read
O
K
N
A
C
O
P
S
T
P
internal
Address
will
then
DS22130A-page 11
Pointer
issue
will
an

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