MAX780AEAG+T Maxim Integrated, MAX780AEAG+T Datasheet - Page 6

• Manufacturer Part Number: MAX780AEAG+T
• Description: Power Switch ICs - Power Distribution
• Manufacturer: Maxim Integrated

Specifications of MAX780AEAG+T

• Rohs: yes
• Number Of Outputs: 2
• On Resistance (max): 1.6 Ohms, 30 Ohms, 140 Ohms
• Operating Supply Voltage: 2.85 V to 5.5 V, 0 V to 12.6 V
• Supply Current (max): 0.13 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-24
• Maximum Power Dissipation: 640 mW
• Minimum Operating Temperature: - 40 C

Dual-Slot PCMCIA Analog Power Controller
Table 1. AVPP Control Logic
Table 2. BVPP Control Logic
Table 3. ADRV3 and ADRV5 Control Logic
Table 4. BDRV3 and BDRV5 Control Logic
6
_______________________________________________________________________________________
C1
C1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
C1
C1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
AVCC1
BVCC1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
AVPP1
BVPP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
AVCC0
BVCC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AVPP0
BVPP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ADRV3
BDRV3
Hi-Z
Hi-Z
Hi-Z
Hi-Z
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
VCCIN
High-Z
VCCIN
VCCIN
High-Z
VCCIN
VPPIN
VPPIN
VPPIN
VPPIN
AVPP
BVPP
ADRV5
BDRV5
0V
0V
0V
0V
0V
0V
Hi-Z
Hi-Z
Hi-Z
Hi-Z
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
All four versions (A, B, C, and D) of the MAX780 allow
simple switching of PCMCIA card V
12V. On-chip power MOSFETs connect AVPP and
BVPP to either GND, VCCIN, or VPPIN. The AVPP0
and AVPP1 control logic inputs determine the state of
AVPP. Likewise, BVPP0 and BVPP1 control BVPP.
To prevent V
in the +12V supply, the VPPIN bypass capacitor (C
should be 10 times greater than the capacitance from
AVPP (C
and C
The AGPI and BGPI status outputs signal when the V
lines are valid. AGPI goes low when AVPP exceeds
11.05V; BGPI goes low when BVPP exceeds 11.05V.
The status outputs and the reference are only active
when SHDN is high.
Pulling SHDN low puts the MAX780 into a low supply-
current mode and disables the reference and the AGPI
and BGPI status outputs. The V
ADRV5, ADRV3, BDRV5, BDRV3 are all forced low
when SHDN is low. V
state of SHDN. Program AVPP and BVPP to 0V for low-
est power consumption when SHDN is low. Wait at
least 200µs after bringing the MAX780 out of shutdown
before checking AGPI or BGPI since the reference
needs time to stabilize.
The MAX780 contains level shifters that simplify driving
external power MOSFETs to switch PCMCIA card V
to 3.3V and 5V. While a PCMCIA card is being insert-
ed into the socket, the V
nector should be powered down to 0V so that “hot
insertion” does not damage the PCMCIA card. The
simplest way to accomplish this is to pull out a
mechanical switch before the PCMCIA card is inserted.
The mechanical switch can be pushed in only when
the card has been fitted snugly into its socket. The
MAX780 Detailed Operating Circuit shows this method.
In the Detailed Operating Circuit, (with the mechanical
interlock switch closed) the PCMCIA card V
be pulled more than a diode drop below 3.3V. The N-
channel power MOSFET that connects V
its drain tied to V
its body diode prevents the card’s V
0V. If it were rotated so that the source connected to
V
ply to the 3.3V supply via the MOSFET’s body diode.
________________
CC
, then applying 5V to V
B
are 0.1µF, C
A
) or BVPP (C
PP
overshoot due to parasitic inductance
CC
IN
and its source tied to 3.3V, so that
PP
Detailed Description
should be 1.0µF.
B
switching is not affected by the
CC
) to GND. Hence, when C
CC
pins on the card edge con-
would short the 5V sup-
V
V
CC
PP
CC
PP
CC
to 0V, 5V, and
CC
Switching
Switching
level shifters
from falling to
to 3.3V has
CC
cannot
CC
IN
PP
A
)