MCIMX6S7CVM08AB Freescale Semiconductor, MCIMX6S7CVM08AB Datasheet - Page 26

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MCIMX6S7CVM08AB

Manufacturer Part Number
MCIMX6S7CVM08AB
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6S7CVM08AB

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
128 KB
Maximum Operating Temperature
+ 105
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX6S7CVM08AB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
4.1.7
4.1.7.1
In power down mode, everything is powered down, including the VBUS valid detectors, typ condition.
Table 13
4.2
The system design must comply with power-up sequence, power-down sequence, and steady state
guidelines as described in this section to guarantee the reliable operation of the device. Any deviation
from these sequences may result in the following situations:
4.2.1
For power-up sequence, the restrictions are as follows:
26
Current
Excessive current during power-up phase
Prevention of the device from booting
Irreversible damage to the processor (worst-case scenario)
VDD_SNVS_IN supply must be turned ON before any other power supply. It may be connected
(shorted) with VDD_HIGH_IN supply.
If a coin cell is used to power VDD_SNVS_IN, then ensure that it is connected before any other
supply is switched on.
If VDD_ARM_IN and VDD_SOC_IN are connected to different external supply sources, then
VDD_ARM_IN supply must be turned ON together with VDD_SOC_IN supply or not delayed
more than 1 ms.
shows the USB interface current consumption in power down mode.
Power Supplies Requirements and Restrictions
USB PHY Current Consumption
Power-Up Sequence
Power Down Mode
The currents on the VDDHIGH_CAP and VDDUSB_CAP were identified
to be the voltage divider circuits in the USB-specific level shifters.
The POR_B input (if used) must be immediately asserted at power-up and
remain asserted until the last power rail reaches its working voltage. In the
absence of an external reset feeding the POR_B input, the internal POR
module takes control. See the i.MX 6SoloLite reference manual for further
details and to ensure that all necessary requirements are being met.
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Table 13. USB PHY Current Consumption in Power Down Mode
VDDUSB_CAP (3.0 V)
5.1 μA
NOTE
NOTE
VDDHIGH_CAP (2.5 V)
1.7 μA
NVCC_PLL_OUT (1.1 V)
Freescale Semiconductor
<0.5 μA

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