DS2125+ Maxim Integrated, DS2125+ Datasheet - Page 6

• Manufacturer Part Number: DS2125+
• Description: SCSI Interface IC
• Manufacturer: Maxim Integrated
• Series: DS2125r
• Type: SCSI Terminationr

Specifications of DS2125+

• Rohs: yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Supply Current: 32 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Resistance: 110 Ohms
• Part # Aliases: 90-21250+000

The DS2125’s DIFF_CAP pin monitors the DIFFSENS line to determine the device’s proper operating mode. The
DIFFSENSE pin can also drive the SCSI DIFFSENS line to determine the SCSI bus-operating mode. The DS2125
switches to the termination mode that is appropriate for the bus based on the value of the DIFFSENS voltage.
These modes are LVD mode, SE mode, and HVD isolation mode.
LVD MODE
A precision laser-trimmed resistor string with two amplifiers provides LVD termination. This configuration yields
105Ω differential and 150Ω common-mode impedance. A 112mV fail-safe bias is maintained when no drivers are
connected to the SCSI bus.
SE MODE
When the external driver for a given signal line turns off, the active terminator pulls that signal line to 2.85V
(quiescent state). The terminating resistors maintain their 110Ω value.
HVD ISOLATION MODE
The DS2125 identifies that there is an HVD device on the SCSI bus and isolates the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus, and V
thermal shutdown, the termination pins are isolated from the SCSI bus, and V
DIFFSENSE driver is shut down during either of these two events. An internal pulldown resistor assures that the
DS2125 is terminating the bus if the ISO pin is left floating.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As with all
analog circuitry, the TERMPWR and V
frequency capacitor are recommended between TPWR and ground, and placed as close as possible to the
DS2125. The DS2125 should be placed as close as possible to the SCSI connector to minimize signal and power
trace length, thereby resulting in less input capacitance and reflections, which can degrade the bus signals.
To maintain the specified regulation, a 4.7µF capacitor is required between the V
DS2125. A high-frequency capacitor (0.1µF ceramic recommended) can also be placed on the V
applications that use fast rise/fall-time drivers. Figure 2 shows a typical SCSI bus configuration.
REFERENCE DOCUMENTS
SUPPLIERS
CHIP INFORMATION
TRANSISTOR COUNT: 8382 MOS and 87 BiPOLAR
PROCESS: BiCMOS
SUBSTRATE CONNECTED TO GROUND
THERMAL INFORMATION
Theta-JA: 65°C/W
American National Standards Institute (ANSI)
Global Engineering Documents
SCSI Parallel Interface 2 (SPI-2)
SCSI Parallel Interface 3 (SPI-3)
SCSI Parallel Interface 4 (SPI-4)
TITLE
SUPPLIER
Project: 1142-M, 1998
Project: 1302-D, 1999
Project: 1365-D, 200x
T10 PROJECT
DOCUMENT
DD
lines should be bypassed locally. A 2.2µF capacitor and a 0.01µF high-
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REF
becomes high impedance. The
REF
REF
pin and ground of each
remains active. During
DOCUMENT NO.
INCITS.362:2002
NCITS.336:2000
X3.302:1998
ANSI
REF
pin in