71V35761S166PFG IDT, 71V35761S166PFG Datasheet - Page 17

• Manufacturer Part Number: 71V35761S166PFG
• Description: SRAM 128Kx36 SYNC 3.3V PIPELINED BURST SRAM
• Manufacturer: IDT

Specifications of 71V35761S166PFG

• Rohs: yes
• Part # Aliases: IDT71V35761S166PFG

Non-Burst Write Cycle Timing Waveform
Non-Burst Read Cycle Timing Waveform
NOTES:
1. ZZ input is LOW, ADV is HIGH and LBO is Don't Care for this cycle.
2. (Ax) represents the data for address Ax, etc.
3. For read cycles, ADSP and ADSC function identically and are therefore interchangable.
NOTES:
1. ZZ input is LOW, ADV and OE are HIGH, and LBO is Don't Care for this cycle.
2. (Ax) represents the data for address Ax, etc.
3. Although only GW writes are shown, the functionality of BWE and BWx together is the same as GW.
4. For write cycles, ADSP and ADSC have different limitations.
IDT71V35761, 128K x 36, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
ADDRESS
CE, CS
DATA
GW, BWE, BWx
ADSC
ADSP
CLK
CS
GW
ADDRESS
IN
DATA
1
0
CE, CS
ADSC
ADSP
CLK
CS
OUT
OE
1
0
Av
Av
(Av)
Aw
Aw
6.42
(Av)
17
Ax
(Aw)
(Aw)
Ay
(Ax)
Ax
Commercial and Industrial Temperature Ranges
(Ax)
Az
(Ay)
Ay
(Ay)
5301 drw 14
(Az)
Az
5301 drw 15
,
,