AS7C1024B-12JIN Alliance Memory, AS7C1024B-12JIN Datasheet - Page 2

• Manufacturer Part Number: AS7C1024B-12JIN
• Description: SRAM 1M, 5V, 12ns FAST 128K x 8 Asynch SRAM
• Manufacturer: Alliance Memory

Specifications of AS7C1024B-12JIN

• Rohs: yes
• Memory Size: 1 Mbit
• Organization: 128 Kbit x 8
• Access Time: 12 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 100 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOJ-32
• Memory Type: CMOS
• Factory Pack Quantity: 21

Functional description
The AS7C1024B is a high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 131,072 words x 8
bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-bank systems.
When CE1 is high or CE2 is low, the devices enter standby mode. If inputs are still toggling, the device will consume I
static, then full standby power is reached (I
conditions.
A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0 through I/O7 is
written on the rising edge of WE (write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external
devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) high. The chips drive I/
O pins with the data word referenced by the input address. When either chip enable is inactive, output enable is inactive, or write enable is active,
output drivers stay in high-impedance mode.
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Key: X = don’t care, L = low, H = high
Truth table
3/26/04, v 1.2
CE1
H
X
L
L
L
Absolute maximum ratings
Voltage on V
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
DC current into outputs (low)
CE2
X
H
H
H
L
CC
relative to GND
Parameter
AA
WE
X
X
H
H
L
, t
SB1
CC
RC
). For example, the AS7C1024B is guaranteed not to exceed 55 mW under nominal full standby
, t
applied
WC
Alliance Memory Inc
) of 10/12/15/20 ns with output enable access times (t
OE
X
X
H
X
L
Symbol
T
I
T
V
V
OUT
P
bias
stg
®
D
t1
t2
High Z
High Z
High Z
D
Data
D
OUT
IN
–0.50
–0.50
Min
–65
–55
–
–
V
CC
+150
+125
OE
Max
+7.0
1.0
20
+0.50
) of 5/6/7/8 ns are ideal for high
Output disable (I
Standby (I
Standby (I
Write (
Read (I
AS7C1024B
Mode
SB
P. 2 of 9
Unit
SB
SB
power. If the bus is
mA
ICC
°C
°C
W
CC
V
V
, I
, I
)
)
SB1
SB1
CC
)
)
)