MAX16047ATN+T Maxim Integrated, MAX16047ATN+T Datasheet - Page 52
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MAX16047ATN+T
Manufacturer Part Number
MAX16047ATN+T
Description
Supervisory Circuits 12Ch EEPROM Prob System Manager
Manufacturer
Maxim Integrated
Series
MAX16047, MAX16049r
Datasheet
1.MAX16047ATNT.pdf
(61 pages)
Specifications of MAX16047ATN+T
Rohs
yes
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
BYPASS: When the BYPASS instruction is latched into
the instruction register, TDI connects to TDO through
the 1-bit bypass test data register. This allows data to
pass from TDI to TDO without affecting the device’s
normal operation.
IDCODE: When the IDCODE instruction is latched into
the parallel instruction register, the identification data
register is selected. The device identification code is
loaded into the identification data register on the rising
USERCODE: When the USERCODE instruction latches
into the parallel instruction register, the user-code data
register is selected. The device user-code loads into
the user-code data register on the rising edge of TCK
following entry into the capture-DR state. Shift-DR can
Table 27. JTAG Instruction Set
Table 28. 32-Bit Identification Code
Table 29. 32-Bit User-Code Data
52
MSB
MSB
______________________________________________________________________________________
Version (4 bits)
LOAD ADDRESS
INSTRUCTION
WRITE DATA
SETEXTRAM
RSTEXTRAM
SETEEPADD
RSTEEPADD
READ DATA
USERCODE
REBOOT
IDCODE
BYPASS
0000
00000000000000000
SAVE
D.C. (don’t cares)
HEX CODE
0000000000000001
Device ID (16 bits)
0Ah
0Bh
0Ch
1Fh
00h
03h
04h
05h
06h
07h
08h
09h
Bypass. Mandatory instruction code.
Manufacturer ID code and part number
User code (user-defined ID)
Load address register content
Memory read
Memory write
Resets the device
Stores current fault information in EEPROM
Extended page access on
Extended page access off
EEPROM page access on
EEPROM page access off
slave address
See Table 31
I
2
C/SMBus
Manufacturer ID (11 bits)
edge of TCK following entry into the capture-DR state.
Shift-DR can be used to shift the identification code out
serially through TDO. During test-logic-reset, the
IDCODE instruction is forced into the instruction regis-
ter. The identification code always has a ‘1’ in the LSB
position. The next 11 bits identify the manufacturer’s
JEDEC number and number of continuation bytes fol-
lowed by 16 bits for the device and 4 bits for the ver-
sion. See Table 28.
be used to shift the user-code out serially through TDO.
See Table 29. This instruction may be used to help
identify multiple MAX16047/MAX16049 devices con-
nected in a JTAG chain.
00011001011
SELECTED REGISTER/ACTION
User identification (firmware version)
r5Ch[7:0] contents
Fixed value (1 bit)
1
LSB
LSB