MAX16048ACB+T Maxim Integrated, MAX16048ACB+T Datasheet - Page 16
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MAX16048ACB+T
Manufacturer Part Number
MAX16048ACB+T
Description
Supervisory Circuits 8Ch EEPROM Prob System Manager
Manufacturer
Maxim Integrated
Series
MAX16046, MAX16048r
Datasheet
1.MAX16046ETNCK4.pdf
(70 pages)
Specifications of MAX16048ACB+T
Rohs
yes
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Note: This data sheet uses a specific convention for referring to bits within a particular address location. As an example, r0Fh[3:0]
refers to bit 3 to bit 0 in register with address 15 decimal.
Extended
Default
Default and
EEPROM
EEPROM
16
PAGE
Software Enable and Margin
C onfi g ur ati on ( Reg i ster s r 50h
DAC Output Margin Levels
RESET and Fault Outputs
Undervoltage Thresholds
User EEPROM (Registers
ADC Conversion Results
to r 5Bh and r 5E h to r 63h)
(Registers r1Ah to r1Bh)
(Registers r1Ch to r1Dh)
(Registers r1Ch to r1Eh)
(Registers r00h to r0Bh)
(Registers r15h to r1Bh)
(Registers r47h to r4Ch)
(Registers r66h to r7Dh)
(Registers r00h to r17h)
(Registers r18h to r19h)
(Registers r0Fh to r11h)
(Registers r12h to r14h)
(Registers r1Fh to r22h)
(Registers r23h to r46h)
Watchdog Functionality
(Registers r00h to r0Eh)
ADC Range Selections
Programmable Output
GPIO Configuration
S eq uenci ng - M od e
Fault Log Results
Failed Line Flags
Overvoltage and
(Register r4Dh)
DAC Registers
(Register r55h)
Fault Behavior
DAC Enables
Configuration
r9Ch to rFFh)
DAC Range
REGISTER
GPIO Data
Input ADC conversion results. ADC writes directly to these registers during normal
operation. ADC input ranges (MON1–MON12) are selected with registers r0Fh to r11h.
Voltage fault flag bits. Flags for each input signal when undervoltage or overvoltage
threshold is exceeded.
GPIO state data. Used to read back and control the state of each GPIO.
DAC output control. Controls whether DAC outputs are high impedance or connected
to the DAC.
DAC code registers. Sets the output voltage of each DAC output.
ADC input voltage range. Selects the voltage range of the monitored inputs.
DAC range registers. Sets the voltage output range of each DAC output.
RESET and FAULT1–FAULT2 output configuration. Programs the functionality of the
RESET, FAULT1, and FAULT2 outputs, as well as which inputs they depend on.
General-purpose input/output configuration registers. GPIOs are configurable as a
manual-reset input, a margin disable input, margin-up/margin-down control inputs, a
watchdog timer input and output, logic inputs/outputs, fault-dependent outputs, or as
the feedback/pulldown inputs (INS_) for closed-loop tracking.
Programmable output configurations. Selectable output configurations include: active-
low or active-high, open-drain or push-pull outputs. EN_OUT1–EN_OUT6 are
configurable as charge-pump outputs, and EN_OUT1–EN_OUT4 can be configured
for closed-loop tracking.
Input overvoltage and undervoltage thresholds. ADC conversion results are compared
to overvoltage and undervoltage threshold values stored here. MON_ voltages
exceeding threshold values trigger a fault event.
Selects how the device should operate during faults. Options include latch-off or
autoretry after fault. The autoretry delay is selectable (r4Fh). Use registers r48h
through r4Ch to select fault conditions that trigger a critical fault event.
Use register r4Dh to set the Software Enable bit, to select early warning thresholds
and undervoltage/overvoltage, to enable/disable margining, and to enable/disable the
watchdog for independent/dependent mode.
Assign inputs and outputs for sequencing. Select sequence delays (20µs to 1.6s) with
registers r50h through r54h. Use register r54h to enable/disable the reverse sequence
bit for power-down operation.
Configure watchdog functionality for GPIO5 and GPIO6.
DAC output levels depend on GPIO2 and GPIO3 when configured for margining
functionality. Set registers r66h to r71h for margin up. Set registers r72h to r7Dh for
margin down.
ADC conversion results and failed-line flags at the time of a fault. These values are
recorded by the fault event logger at the time of a critical fault.
User-available EEPROM
Register Summary (All Registers 8-Bits Wide)
DESCRIPTION