STM8AF6289TAY STMicroelectronics, STM8AF6289TAY Datasheet - Page 78
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STM8AF6289TAY
Manufacturer Part Number
STM8AF6289TAY
Description
8-bit Microcontrollers - MCU 8-Bit Automotive MCU EEPROM 96kb Flash
Manufacturer
STMicroelectronics
Datasheet
1.STM8AF5289TCX.pdf
(110 pages)
Specifications of STM8AF6289TAY
Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
STM8A
Data Bus Width
8 bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8AF6289TAY
Manufacturer:
STMicroelectronics
Quantity:
10 000
Electrical characteristics
10.3.9
Table 43.
1. f
2. The pad has to be configured accordingly (fast mode).
3. Values based on design simulation and/or characterization results, and not tested in production.
4. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.
5. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.
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t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
a(SO)
1/t
su(NSS)
Symbol
t
t
t
h(NSS)
t
t
t
t
su(MI)
t
h(MO)
su(SI)
v(MO)
h(SO)
t
v(SO)
t
h(MI)
h(SI)
r(SCK)
f(SCK)
f
SCK
c(SCK)
SCK
(3)(4)
(3)
(3)(5)
(3)
(3)
(3)
(3)
< f
(3)
(3)
(3)
(3)
(3)
(3)
(3)
MASTER
SPI clock frequency
SPI clock rise and fall time Capacitive load: C = 30 pF
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output valid time
Data output hold time
SPI interface
Unless otherwise specified, the parameters given in
performed under ambient temperature, f
conditions. t
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
SPI characteristics
/2.
Parameter
MASTER
= 1/f
Master mode
Slave mode
Slave mode
Slave mode
Master mode
Master mode
Slave mode
Master mode
Slave mode
Slave mode
Slave mode
Slave mode
(after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
MASTER
Doc ID 14395 Rev 9
.
Conditions
MASTER
V
V
V
V
DD
DD
DD
DD
< 4.5 V
= 4.5 V to 5.5 V
< 4.5 V
= 4.5 V to 5.5 V
t
SCK
frequency, and V
/2 - 15
Table 43
STM8AF52/62xx, STM8AF51/61xx
are derived from tests
4 * t
t
SCK
DD
Min
MASTER
70
/2 + 15
10
25
31
12
—
—
—
—
—
0
0
5
5
7
0
supply voltage
t
3* t
t
w(SCKH)
w(SCKL)
25
Max
6
8
MASTER
30
10
—
—
—
—
—
—
75
53
—
—
(1)
(1)
(2)
(3)
(3)
MHz
Unit
ns