CAT1162WI-42-G ON Semiconductor, CAT1162WI-42-G Datasheet - Page 5
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CAT1162WI-42-G
Manufacturer Part Number
CAT1162WI-42-G
Description
Supervisory Circuits CPU w/16K
Manufacturer
ON Semiconductor
Datasheet
1.CAT1162WI-45-G.pdf
(13 pages)
Specifications of CAT1162WI-42-G
Product Category
Supervisory Circuits
Rohs
yes
Number Of Voltages Monitored
1
Monitored Voltage
3 V, 3.3 V, 5 V
Undervoltage Threshold
4.25 V
Overvoltage Threshold
4.5 V
Output Type
Active High, Active Low, Open Drain
Manual Reset
Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
270 ms
Supply Voltage - Max
6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8 Wide
Chip Enable Signals
No
Maximum Power Dissipation
1000 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Supply Current (typ)
3000 uA
Supply Voltage - Min
2.7 V
WP: WRITE PROTECT
Write Protected (READ only). When the pin is tied to GND
or left floating normal read/write operations are allowed to
the device.
RESET/RESET: RESET I/O
inputs. By forcing a reset condition on the pins the device
will initiate and maintain a reset condition. The RESET pin
must be connected through a pulldown resistor, and the
RESET pin must be connected through a pull−up resistor.
Reset Controller Description
correct system operation during brownout and power
up/down conditions. It is configured with open drain
RESET outputs. During power−up, the RESET outputs
remain active until V
continue driving the outputs for approximately 200 ms
(t
interval, the device will cease to drive the reset outputs. At
this point the reset outputs will be pulled up or down by their
respective pull up/down resistors. During power−down, the
RESET outputs will be active when V
The RESET outputs will be valid so long as V
(V
act as a signal conditioning circuit for an externally applied
manual reset. The inputs are edge triggered; that is, the
RESET input in the CAT1161/2 will initiate a reset timeout
PURST
If the pin is tied to V
These are open drain pins and can be used as reset trigger
The CAT1161/2 precision RESET controller ensures
The RESET pins are I/Os; therefore, the CAT1161/2 can
RVALID
RESET
) after reaching V
RESET
V
).
CC
V
RVALID
V
TH
CC
CC
reaches the V
the entire memory array becomes
TH
. After the t
TH
CC
threshold and will
falls below V
PURST
Figure 1. RESET Output Timing
CC
t
is > 1.0 V
PURST
DEVICE OPERATION
PIN DESCRIPTION
timeout
http://onsemi.com
TH
t
GLITCH
.
5
t
RPD
SDA: SERIAL DATA ADDRESS
all data into and out of the device. The SDA pin is an open
drain output and can be wire−ORed with other open drain or
open collector outputs.
1.6 seconds, the watchdog timer times out.
SCL: Serial Clock
after detecting a low to high transition and the RESET input
will initiate a reset timeout after detecting a high to low
transition.
Watchdog Timer
for microcontrollers. During a system failure, the CAT1161
will respond with a reset signal after a time−out interval of
1.6 seconds for a lack of activity. The CAT1161 is designed
with the Watchdog Timer feature on the SDA input. If the
microcontroller does not toggle the SDA input pin within 1.6
seconds, the Watchdog Timer times out. This will generate
a reset condition on reset outputs. The Watchdog Timer is
cleared by any transition on SDA.
will not count and will stay cleared.
The bidirectional serial data/address pin is used to transfer
If there is no transition on the SDA for more than
Serial clock input.
The Watchdog Timer provides an independent protection
As long as reset signal is asserted, the Watchdog Timer
The CAT1162 does not have a Watchdog.
t
PURST
t
RPD