M93C86-WBN6P STMicroelectronics, M93C86-WBN6P Datasheet - Page 8
M93C86-WBN6P
Manufacturer Part Number
M93C86-WBN6P
Description
IC EEPROM 16KBIT 2MHZ 8DIP
Manufacturer
STMicroelectronics
Datasheets
1.M93C46-WMN6TP.pdf
(36 pages)
2.M93C46-WMN6TP.pdf
(37 pages)
3.M93C46-WBN6P.pdf
(31 pages)
Specifications of M93C86-WBN6P
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
16K (2K x 8 or 1K x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Organization
2 K x 8
Interface Type
Microwire
Maximum Clock Frequency
2 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Memory Configuration
2048 X 8, 1024 X 16
Clock Frequency
2MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8595-5
M93C86-WBN6P
M93C86-WBN6P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
M93C86, M93C76, M93C66, M93C56, M93C46
Read
The Read Data from Memory (READ) instruction
outputs data on Serial Data Output (Q). When the
instruction is received, the op-code and address
are decoded, and the data from the memory is
transferred to an output shift register. A dummy 0
bit is output first, followed by the 8-bit byte or 16-
bit word, with the most significant bit first. Output
data changes are triggered by the rising edge of
Serial Clock (C). The M93Cx6 automatically incre-
ments the internal address register and clocks out
the next byte (or word) as long as the Chip Select
Input (S) is held High. In this case, the dummy 0 bit
is not output between bytes (or words) and a con-
tinuous stream of data can be read.
Figure 4. READ, WRITE, EWEN, EWDS Sequences
Note: For the meanings of An, Xn, Qn and Dn, see
8/31
READ
WRITE
ERASE
WRITE
ENABLE
S
Q
S
S
Q
D
D
D
1 0
1
1 1 0 An
CODE
CODE
CODE
OP
OP
0
OP
1
0
1
An
1
ADDR
ADDR
Xn X0
Table
A0
A0
5.,
Qn
Dn
Table 6.
and
DATA OUT
DATA IN
Erase/Write Enable and Disable
The Erase/Write Enable (EWEN) instruction en-
ables the future execution of erase or write instruc-
tions, and the Erase/Write Disable (EWDS)
instruction disables it. When power is first applied,
the M93Cx6 initializes itself so that erase and write
instructions are disabled. After an Erase/Write En-
able (EWEN) instruction has been executed, eras-
ing and writing remains enabled until an Erase/
Write Disable (EWDS) instruction is executed, or
until V
voltage. To protect the memory contents from ac-
cidental corruption, it is advisable to issue the
Erase/Write Disable (EWDS) instruction after ev-
ery write cycle. The Read Data from Memory
(READ) instruction is not affected by the Erase/
Write Enable (EWEN) or Erase/Write Disable
(EWDS) instructions.
Table
ERASE
WRITE
DISABLE
7..
CC
falls below the power-on reset threshold
S
D
D0
Q0
BUSY
1
CODE
STATUS
CHECK
0
OP
0
0
0
READY
Xn X0
AI00878C