STM8AF6288TDX STMicroelectronics, STM8AF6288TDX Datasheet - Page 26
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
STM8AF6288TDX
Manufacturer Part Number
STM8AF6288TDX
Description
8-bit Microcontrollers - MCU 8-Bit Automotive MCU EEPROM 64kb Flash
Manufacturer
STMicroelectronics
Datasheet
1.STM8AF5289TCX.pdf
(110 pages)
Specifications of STM8AF6288TDX
Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
STM8A
Data Bus Width
8 bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8AF6288TDX
Manufacturer:
STMicroelectronics
Quantity:
10 000
Product overview
5.9.3
5.9.4
26/110
Serial peripheral interface (SPI)
The devices covered by this datasheet contain one SPI. The SPI is available on all the
supported packages.
●
●
●
●
●
●
●
●
●
●
●
●
Inter integrated circuit (I
The devices covered by this datasheet contain one I
on all the supported packages.
●
●
●
●
●
●
Maximum speed: 8 Mbit/s or f
Full duplex synchronous transfers
Simplex synchronous transfers on two lines with a possible bidirectional data line
Master or slave operation - selectable by hardware or software
CRC calculation
1 byte Tx and Rx buffer
Slave mode/master mode management by hardware or software for both master and
slave
Programmable clock polarity and phase
Programmable data order with MSB-first or LSB-first shifting
Dedicated transmission and reception flags with interrupt capability
SPI bus busy status flag
Hardware CRC feature for reliable communication:
–
–
I
–
–
I
–
–
Generation and detection of 7-bit/10-bit addressing and general call
Supports different communication speeds:
–
–
Status flags:
–
–
–
Error flags:
–
–
–
–
2
2
C master features:
C slave features:
CRC value can be transmitted as last byte in Tx mode
CRC error checking for last received byte
Clock generation
Start and stop generation
Programmable I
Stop bit detection
Standard speed (up to 100 kHz),
Fast speed (up to 400 kHz)
Transmitter/receiver mode flag
End-of-byte transmission flag
I
Arbitration lost condition for master mode
Acknowledgement failure after address/data transmission
Detection of misplaced start or stop condition
Overrun/underrun if clock stretching is disabled
2
C busy flag
2
C address detection
Doc ID 14395 Rev 9
2
C) interface
MASTER
/2 both for master and slave
2
C interface. The interface is available
STM8AF52/62xx, STM8AF51/61xx