CY7C1347G-133AXC Cypress Semiconductor Corp, CY7C1347G-133AXC Datasheet - Page 16

• Manufacturer Part Number: CY7C1347G-133AXC
• Description: IC SRAM 4.5MBIT 133MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1347G-133AXC

• Memory Size: 4.5M (128K x 36)
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Memory Configuration: 128K X 36
• Clock Frequency: 133MHz
• Access Time: 4ns
• Supply Voltage Range: 3.135V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-1741; CY7C1347G-133AXC

Switching Waveforms
Notes
Document #: 38-05516 Rev. *I
18. In this diagram, when CE is LOW, CE
19. Full width write can be initiated by either GW LOW, or by GW HIGH, BWE LOW, and BW
Data Out (Q)
Data In (D)
ADDRESS
BW[A :B]
ADSP
ADSC
BWE,
ADV
CLK
GW
OE
CE
BURST READ
High-Z
t ADS
t CES
t AS
A1
t ADH
t CEH
t AH
t CH
t
OEHZ
Byte write signals are
ignored for first cycle when
ADSP initiates burst
t CYC
(continued)
t ADS
1
t CL
t DS
is LOW, CE
Single WRITE
D(A1)
t ADH
t DH
2
is HIGH, and CE
A2
Figure 6. Write Cycle Timing
D(A2)
DON’T CARE
3
is LOW. When CE is HIGH, CE
D(A2 + 1)
t WES
BURST WRITE
t WEH
UNDEFINED
D(A2 + 1)
x
LOW.
ADV suspends burst
[18, 19]
D(A2 + 2)
1
ADSC extends burst
is HIGH, CE
D(A2 + 3)
2
is LOW, or CE
t ADS
A3
D(A3)
t ADH
t
ADVS
t WES
Extended BURST WRITE
3
D(A3 + 1)
is HIGH.
t
t WEH
ADVH
CY7C1347G
D(A3 + 2)
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