CY14B256L-SP35XC Cypress Semiconductor Corp, CY14B256L-SP35XC Datasheet - Page 4

• Manufacturer Part Number: CY14B256L-SP35XC
• Description: IC NVSRAM 256KBIT 35NS 48SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of CY14B256L-SP35XC

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 256K (32K x 8)
• Speed: 35ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-SSOP
• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 35ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SSOP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Pin Count: 48
• Mounting: Surface Mount
• Supply Current: 55mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2031-5; CY14B256L-SP35XC

Table 1. Pin Definitions
Document Number: 001-54707 Rev. *F
DQ
Pin Name
A
0
V
HSB
0
V
WE
V
CE
OE
NC
– A
CAP
– DQ
CC
SS
14
7
Input/Output Bidirectional data I/O lines. Used as input or output lines depending on operation.
Input/Output Hardware STORE busy (HSB). When LOW this output indicates that a Hardware STORE is in progress.
No connect No connect. This pin is not connected to the die.
I/O Type
Ground
supply
supply
Power
Power
Input
Input
Input
Input
Address inputs. Used to select one of the 32,768 bytes of the nvSRAM.
Write enable input, active LOW. When the chip is enabled and WE is LOW, data on the I/O pins is written
to the specific address location.
Chip enable input, active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output enable, active LOW. The active LOW OE input enables the data output buffers during read cycles.
I/O pins are tristated on deasserting OE HIGH.
Ground for the device. Must be connected to the ground of the system.
Power supply inputs to the device. 3.0 V +20%, –10%
When pulled LOW external to the chip it initiates a nonvolatile STORE operation. After each Hardware
and Software STORE operation HSB is driven HIGH for a short time (t
current and then a weak internal pull-up resistor keeps this pin HIGH (External pull-up resistor connection
optional).
AutoStore capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to nonvol-
atile elements.
Description
HHHD
) with standard output high
CY14B256LA
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