CY14B256L-SP35XI Cypress Semiconductor Corp, CY14B256L-SP35XI Datasheet
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CY14B256L-SP35XI
Specifications of CY14B256L-SP35XI
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CY14B256L-SP35XI Summary of contents
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... Document Number: 001-06422 Rev. *I 256 Kbit (32K x 8) nvSRAM Functional Description The Cypress CY14B256L is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent, nonvolatile data resides in the highly reliable QuantumTrap cell ...
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... Capacitance ........................................................................ 9 Thermal Resistance ............................................................ 9 AC Test Conditions ............................................................ 9 SRAM Read Cycle ......................................................10 SRAM Write Cycle .......................................................11 AutoStore or Power Up RECALL ....................................12 Software Controlled STORE/RECALL Cycle ..................13 Switching Waveforms ......................................................14 Part Numbering Nomenclature ........................................15 Ordering Information ........................................................15 Sales, Solutions, and Legal Information ........................19 Worldwide Sales and Design Support .........................19 Products ......................................................................19 CY14B256L Page [+] Feedback [+] Feedback ...
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... V Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM CAP to nonvolatile elements Connect No Connect. This pin is not connected to the die. Document Number: 001-06422 Rev. *I CY14B256L Description Page [+] Feedback [+] Feedback ...
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... SRAM. In addition, it provides unlimited RECALL opera- tions from the nonvolatile cells and up to 200K STORE opera- tions. SRAM Read The CY14B256L performs a READ cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified on pins A determines the 32,768 data bytes accessed. When 0– ...
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... STORE, the WRITE is inhibited until a negative transition detected. This protects against inadvertent writes during power up or brown out conditions. Noise Considerations The CY14B256L is a high speed memory. It must have a high frequency bypass capacitor of approximately 0.1 µF connected between possible. As with all high speed CMOS ICs, careful routing of power, ground, and signals reduce circuit noise ...
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... Customers that want to use a larger V to make sure there is extra store charge should discuss their V size selection with Cypress to understand any impact on CAP the V voltage level at the end CAP CY14B256L value because CAP value CAP period. RECALL Page [+] Feedback ...
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... The six consecutive address locations are in the order listed HIGH during all six cycles to enable a nonvolatile cycle. 2. While there are 15 address lines on the CY14B256L, only the lower 14 lines are used to control software modes. 3. I/O state depends on the state of OE. The I/O table shown is based on OE Low. ...
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... STORE – 0.2V). All others V < 0.2V or > Max, V < V < Max, V < V < > – pin and Vss, 6V rated. CAP Description CY14B256L Ambient Temperature V CC 0°C to +70°C 2.7V to 3.6V -40°C to +85°C 2.7V to 3.6V Min Max Commercial Industrial – 0.2V ...
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... MHz 3.0V CC [5] Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. Figure 4. AC Test Loads 3.0V Output 789Ω CY14B256L Max Unit 32-SOIC 48-SSOP Unit °C/W 42.36 44.26 °C/W 21.41 25.56 For Tri-state Specs R1 577Ω ...
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... WE must be HIGH during SRAM Read cycles. 7. Device is continuously selected with CE and OE both Low. 8. Measured ±200 mV from steady state output voltage. 9. HSB must remain HIGH during SRAM Read and Write Cycles. Document Number: 001-06422 Rev Description Min Max CY14B256L Unit Min Max Min Max ...
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... Low when CE goes Low, the outputs remain in the high impedance state. 11 must be greater than V during address transitions. IH Document Number: 001-06422 Rev Description Min Max [10, 11 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE [10, 11 SCE PWE t SD DATA VALID HIGH IMPEDANCE CY14B256L Unit Min Max Min Max LZWE ...
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... If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE will take place. 14. Industrial grade devices requires 15 ms max. Document Number: 001-06422 Rev. *I Description Rise Time CC Figure 9. AutoStore/Power Up RECALL t STORE t HRECALL SWITCH . SWITCH CY14B256L CY14B256L Unit Min Max 20 ms 12.5 ms 2.65 V μs 150 No STORE occurs STORE occurs only if a SRAM write ...
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... The six consecutive addresses must be read in the order listed in the Mode Selection table. WE must be HIGH during all six consecutive cycles. Document Number: 001-06422 Rev. *I [15, 16 Description Min DATA VALID CY14B256L Max Min Max Min Max 120 120 120 [16 STORE RECALL HIGH IMPEDANCE DATA VALID [16 ...
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... This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command. 19. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See specific command. Document Number: 001-06422 Rev. *I Description Figure 12. Hardware STORE Cycle Figure 13. Soft Sequence Processing CY14B256L CY14B256L Unit Min Max ...
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... CY14B256L-SZ25XC CY14B256L-SP25XCT CY14B256L-SP25XC CY14B256L-SZ25XIT CY14B256L-SZ25XI CY14B256L-SP25XIT CY14B256L-SP25XI 35 CY14B256L-SZ35XCT CY14B256L-SZ35XC CY14B256L-SP35XCT CY14B256L-SP35XC CY14B256L-SZ35XIT CY14B256L-SZ35XI CY14B256L-SP35XIT CY14B256L-SP35XI Document Number: 001-06422 Rev. *I Option: T-Tape and Reel Blank - Std. Temperature Commercial (0 to 70° Industrial (-40 to 85°C) Package 32-SOIC SP - 48-SSOP Data Bus Voltage 5.0V Package Diagram ...
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... These parts are not recommended for new designs. Speed Ordering Code (ns) 45 CY14B256L-SZ45XCT CY14B256L-SZ45XC CY14B256L-SP45XCT CY14B256L-SP45XC CY14B256L-SZ45XIT CY14B256L-SZ45XI CY14B256L-SP45XIT CY14B256L-SP45XI All parts are Pb-free. This table contains Final information. Contact your local Cypress sales representative for availability of these parts Package Diagrams 16 17 0.810[20.574] 0.822[20.878] 0.050[1.270] TYP. 0.014[0.355] ...
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... Package Diagrams (continued) Figure 15. 48-Pin (300 mil) Shrunk Small Outline Package (51-85061) Document Number: 001-06422 Rev. *I CY14B256L 51-85061-*C Page [+] Feedback [+] Feedback ...
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... Document History Page Document Title: CY14B256L 256 Kbit (32K x 8) nvSRAM Document Number: 001-06422 Submission Rev. ECN No. Date ** 425138 See ECN *A 437321 See ECN *B 471966 See ECN *C 503277 See ECN *D 597004 See ECN *E 696097 See ECN *F 1349963 See ECN *G 2483006 See ECN ...
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... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-06422 Rev. *I AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. psoc.cypress.com clocks.cypress.com image.cypress.com Revised November 26, 2009 CY14B256L Page [+] Feedback [+] Feedback ...