CY7C057V-12AC Cypress Semiconductor Corp, CY7C057V-12AC Datasheet - Page 8

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CY7C057V-12AC

Manufacturer Part Number
CY7C057V-12AC
Description
IC SRAM 32KX36 3.3V ASYN 144LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C057V-12AC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
1.152M (32K x 36)
Speed
12ns
Interface
Parallel
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1173

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C057V-12AC
Manufacturer:
AD
Quantity:
993
Part Number:
CY7C057V-12AC
Manufacturer:
CYPRESS
Quantity:
300
Part Number:
CY7C057V-12AC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Switching Characteristics
Document #: 38-06055 Rev. **
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
13. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
14. To access RAM, CE = L and SEM = H. To access semaphore, CE = H and SEM = L. Either condition must be valid for the entire t
15. At any given temperature and voltage condition for any given device, t
16. Test conditions used are Load 2.
17. This parameter is guaranteed by design, but it is not production tested. For information on port-to-port delay through RAM cells from writing port to reading
18. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform.
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
LZBE
HZBE
PU
PD
ABE
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
WDD
DDD
Read Cycle
Write Cycle
Parameter
[14]
[3, 17]
[3, 17]
[14]
[3, 14]
[3, 14]
[18]
I
port, refer to Read Timing with Busy waveform.
[18]
OI
[3, 13, 16, 17]
[3, 15, 16, 17]
[3, 15, 16, 17]
[3, 15, 16, 17]
[16, 17]
[16, 17]
/I
OH
and 10-pF load capacitance.
Read Cycle Time
Address to Data Valid
Output Hold From Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE Low to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
Byte Enable to Low Z
Byte Enable to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable Access Time
Write Cycle Time
CE LOW to Write End
Address Valid to Write End
Address Hold From Write End
Address Set-Up to Write Start
Write Pulse Width
Data Set-Up to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
Description
Over the Operating Range
[13]
HZCE
Min.
12
12
10
10
10
10
3
0
3
3
0
0
0
0
3
is less than t
-12
Max.
12
12
10
10
10
12
12
10
25
20
LZCE
8
and t
HZOE
Min.
15
15
12
12
12
10
CY7C056V
CY7C057V
3
0
3
3
0
0
0
0
3
is less than t
-15
Max.
15
15
10
10
10
10
15
15
10
30
25
LZOE
.
SCE
Min.
20
20
15
15
15
15
3
0
3
3
0
0
0
0
3
time.
-20
Max.
CY7C056V
CY7C057V
20
20
12
12
12
12
20
20
12
45
30
Page 8 of 23
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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