11AA010T-I/TT Microchip Technology, 11AA010T-I/TT Datasheet - Page 15

• Manufacturer Part Number: 11AA010T-I/TT
• Description: IC EEPROM 1KBIT 100KHZ SOT23-3
• Manufacturer: Microchip Technology

Specifications of 11AA010T-I/TT

• Memory Size: 1K (128 x 8)
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz
• Interface: UNI/O™ (Single Wire)
• Voltage - Supply: 1.8 V ~ 5.5 V
• Organization: 128 x 8
• Interface Type: Serial
• Maximum Clock Frequency: 100 KHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 50 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 11AA010T-I/TTTR

4.6
The
four levels of protection for the array by writing to the
appropriate bits in the STATUS register. The array is
divided up into four segments. The user has the ability
to write-protect none, one, two, or all four of the seg-
ments of the array. The partitioning is controlled as
illustrated in Table 4-3.
TABLE 4-3:
TABLE 4-4:
FIGURE 4-7:
 2010 Microchip Technology Inc.
WRSR
Note 1: For the 11XXXX1, this bit must be a ‘1’.
SCIO
SCIO
BP1
0
0
1
1
Write Status Register (WRSR)
Instruction
Density
instruction allows the user to select one of
16K
1K
2K
4K
8K
0
ARRAY PROTECTION
PROTECTED ARRAY ADDRESS LOCATIONS
Standby Pulse
1
1
Command
WRITE STATUS REGISTER COMMAND SEQUENCE
BP0
0
0
1
0
1
1
1
1
0
180h-1FFh
300h-3FFh
600h-7FFh
Address Ranges Write-Protected
Upper 1/4
C0h-FFh
60h-7Fh
0
7 6 5 4
Start Header
Status Register Data
1
Preliminary
Upper 1/4
Upper 1/2
0
None
All
1
0
3 2 1 0
1
After transmitting the STATUS register data, the master
must transmit a NoMAK during the Acknowledge
sequence in order to initiate the internal write cycle.
Note: The
0
11AAXXX/11LCXXX
100h-1FFh
200h-3FFh
400h-7FFh
Upper 1/2
80h-FFh
1
40h-7Fh
nated with a NoMAK following the data
byte. If a NoMAK is not received at this
point, the command will be considered
invalid, and the device will go into Idle
mode without responding with a SAK or
executing the command.
Twc
WRSR
1
Address Ranges Unprotected
0
Device Address
1
instruction must be termi-
0
0
Lower 3/4
Lower 1/2
0
None
All
All Sectors
000h-1FFh
000h-3FFh
000h-7FFh
0
00h-FFh
00h-7Fh
DS22067H-page 15
0
(1)