SST49LF080A-33-4C-NHE Microchip Technology, SST49LF080A-33-4C-NHE Datasheet - Page 19
![IC FLASH SER LPC 8MBIT 32PLCC](/photos/16/11/161161/sst49lf080a_sml.jpg)
SST49LF080A-33-4C-NHE
Manufacturer Part Number
SST49LF080A-33-4C-NHE
Description
IC FLASH SER LPC 8MBIT 32PLCC
Manufacturer
Microchip Technology
Datasheets
1.SST49LF080A-33-4C-NHE.pdf
(49 pages)
2.SST49LF080A-33-4C-NHE.pdf
(2 pages)
3.SST49LF080A-33-4C-NHE.pdf
(2 pages)
Specifications of SST49LF080A-33-4C-NHE
Memory Type
FLASH
Memory Size
8M (1M x 8)
Operating Temperature
0°C ~ 85°C
Package / Case
32-PLCC
Format - Memory
FLASH
Speed
33MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Data Bus Width
8 bit
Architecture
Sectored
Interface Type
LPC
Access Time
33 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
12 mA
Mounting Style
SMD/SMT
Organization
1024 KB x 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST49LF080A-33-4C-NHE
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
SST49LF080A-33-4C-NHE
Manufacturer:
SST
Quantity:
20 000
Company:
Part Number:
SST49LF080A-33-4C-NHE-T
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
SST49LF080A-33-4C-NHE-T
Manufacturer:
SST
Quantity:
20 000
8 Mbit LPC Flash
SST49LF080A
Data Protection (PP Mode)
The SST49LF080A devices provide both hardware and
software features to protect nonvolatile data from inadvert-
ent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# pulse of less than 5 ns will
not initiate a Write cycle.
V
inhibited when V
Write Inhibit Mode: Forcing OE# low, WE# high will inhibit
the Write operation. This prevents inadvertent writes during
power-up or power-down.
©2006 Silicon Storage Technology, Inc.
DD
Power Up/Down Detection: The Write operation is
DD
is less than 1.5V.
19
Software Data Protection (SDP)
The SST49LF080A provides the JEDEC approved Soft-
ware Data Protection scheme for all data alteration opera-
tion, i.e., Program and Erase. Any Program operation
requires the inclusion of a series of three-byte sequence.
The three-byte load sequence is used to initiate the Pro-
gram operation, providing optimal protection from inadvert-
ent Write operations, e.g., during the system power-up or
power-down. Any Erase operation requires the inclusion of
a six-byte load sequence.
S71235-02-000
Data Sheet
5/06