MAX16010TAA-T Maxim Integrated, MAX16010TAA-T Datasheet - Page 9

• Manufacturer Part Number: MAX16010TAA-T
• Description: Supervisory Circuits
• Manufacturer: Maxim Integrated
• Series: MAX16010, MAX16011, MAX16012, MAX16013, MAX16014r

Specifications of MAX16010TAA-T

• Number Of Voltages Monitored: 2
• Undervoltage Threshold: 1.215 V, 1.21 V
• Overvoltage Threshold: 1.265 V, 1.26 V
• Output Type: Active Low, Open Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Battery Backup Switching: No Backup
• Supply Voltage - Max: 72 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TDFN EP
• Chip Enable Signals: Yes
• Maximum Power Dissipation: 1455 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Supply Current (typ): 25 uA
• Supply Voltage - Min: 5.5 V

In normal operating mode, internal GATE1 output cir-
cuitry enhances P1 to a 10V gate-to-source (V
11V < V
ensures P1 operates in a low R
gate-source junction is not overstressed during high-
battery-voltage application or transients (many MOSFET
devices specify a ±20V V
V
ing P1 V
power dissipation is very low:
During reverse-battery applications, GATE1 is limited to
GND and the P1 gate-source junction is reverse
biased. P1 is turned off and neither the MAX16013/
MAX16014 nor the load circuitry is exposed to the
reverse-battery voltage. Care should be taken to place
P1 (and its internal drain-to-source diode) in the correct
orientation for proper reverse battery operation.
P2 protects the load from input overvoltage conditions.
During normal operating modes (the monitored voltage
is below the adjusted overvoltage threshold), internal
GATE2 output circuitry enhances P2 to a 10V gate-to-
source (V
enhancement ensures P2 operates in a low R
mode but the gate-to-source junction is not over-
stressed during high-battery-voltage applications
(many pFET devices specify a ±20V V
imum). As V
GND, reducing P2 V
tion, the P2 power dissipation is very low:
CC
drops below 10V GATE1 is limited to GND, reduc-
GS
CC
GS
to V
) for 11V < V
CC
< 72V. The constant 10V enhancement
drops below 10V, GATE2 is limited to
CC
P1 = I
P2 = I
_______________________________________________________________________________________
- GND. In normal operation the P1
GS
LOAD
LOAD
to V
CC
GS
CC
2
2
Ultra-Small, Overvoltage Protection/
x R
x R
< 72V. The constant 10V
absolute maximum). As
- GND. In normal opera-
DS-ON
DS-ON
DS-ON
GS
mode, but the
absolute max-
GS
DS-ON
) for
During overvoltage conditions, P2 is either turned com-
pletely off (overvoltage-switch mode) or cycled off-on-
off (voltage-limiter mode). Care should be taken to
place P2 (and its internal drain-to-source diode) in the
correct orientation for proper overvoltage protection
operation. During voltage-limiter mode, the drain of P2
is limited to the adjusted overvoltage threshold, while
the battery (V
voltage events, P2 temperature can increase rapidly
due to the high power dissipation. The power dissipat-
ed by P2 is:
where V
load limit voltage. For prolonged overvoltage events with
high P2 power dissipation, proper heatsinking is required.
It may be necessary to add an external resistor from
V
capability when the GATE1 input goes high. The
GATE_ output can only source up to 1µA current. If the
source current is less than 1µA, no external resistor
may be necessary. However, to improve the pullup
capability of the GATE_ output when it goes high, con-
nect an external resistor between V
The application shows a 2MΩ resistor, which is large
enough not to impact the sinking capability of the
GATE_ (during normal operation) while providing
enough pullup during an overvoltage event. With an
11V (worst case) V
sinking current of 75µA, the smallest resistor should be
11V/75µA, or about 147kΩ. However, since the GATE_
is typically low most of the time, a higher value should
be used to reduce overall power consumption.
CC
to GATE1 to provide enough additional pullup
CC
~ V
Detection Circuits
Adding External Pullup Resistors
CC
BATTERY
) voltage rises. During prolonged over-
P2 = V
= (V
CC
and V
-to-gate clamp voltage and a
DS-P2
CC
- V
OV-ADJUSTED
x I
OV-ADJUSTED
LOAD
CC
and the GATE_.
is the desired
) x I
LOAD
9