11AA080-I/MS Microchip Technology, 11AA080-I/MS Datasheet - Page 17
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11AA080-I/MS
Manufacturer Part Number
11AA080-I/MS
Description
IC EEPROM 8KBIT 100KHZ 8MSOP
Manufacturer
Microchip Technology
Datasheets
1.11LC010T-ITT.pdf
(44 pages)
2.11LC010T-ITT.pdf
(22 pages)
3.11LC010T-ITT.pdf
(6 pages)
4.11LC160T-ITT.pdf
(38 pages)
Specifications of 11AA080-I/MS
Memory Size
8K (1K x 8)
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz
Interface
UNI/O™ (Single Wire)
Voltage - Supply
1.8 V ~ 5.5 V
Organization
1024 x 8
Interface Type
Serial
Maximum Clock Frequency
100 KHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
50 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
11AA080-I/MS
Manufacturer:
MICROCHIP
Quantity:
12 000
5.0
The following protection has been implemented to
prevent inadvertent writes to the array:
• The Write Enable Latch (WEL) is reset on power-
• A Write Enable (
• After a write, ERAL, SETAL, or WRSR command,
• Commands to access the array or write to the
TABLE 6-1:
© 2008 Microchip Technology Inc.
up
to set the write enable latch
the write enable latch is reset
status register are ignored during an internal write
cycle and programming is not affected
WEL
0
1
DATA PROTECTION
WRITE PROTECT FUNCTIONALITY MATRIX
WREN
) instruction must be issued
Protected Blocks
Protected
Protected
Preliminary
Unprotected Blocks
6.0
The 11XX powers on in the following state:
• The device is in low-power Shutdown mode,
• The Write Enable Latch (WEL) is reset
• The internal Address Pointer is undefined
• A low-to-high transition, standby pulse and subse-
.
Protected
requiring a low-to-high transition on SCIO to enter
Idle mode
quent high-to-low transition on SCIO (the first low
pulse of the header) are required to enter the
active state
Writable
11AAXXX/11LCXXX
POWER-ON STATE
Status Register
Protected
Writable
DS22067D-page 17