93LC86C-I/MS Microchip Technology, 93LC86C-I/MS Datasheet - Page 9
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93LC86C-I/MS
Manufacturer Part Number
93LC86C-I/MS
Description
IC EEPROM 16KBIT 3MHZ 8MSOP
Manufacturer
Microchip Technology
Specifications of 93LC86C-I/MS
Memory Size
16K (2K x 8 or 1K x 16)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
3MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Memory Configuration
2K X 8 / 1K X 16
Ic Interface Type
Microwire
Clock Frequency
3MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
MSOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
93LC86C-I/MS
Manufacturer:
MICROCHIP
Quantity:
12 000
2.6
The 93XX86A/B/C powers up in the Erase/Write
Disable (EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
FIGURE 2-3:
FIGURE 2-4:
2.7
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string.
FIGURE 2-5:
© 2007 Microchip Technology Inc.
CLK
CLK
CS
DO
CS
DI
CLK
DI
CS
DI
Erase/Write Disable and Enable
(EWDS/EWEN)
Read
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
High-Z
1
1
1
EWDS TIMING
EWEN TIMING
READ TIMING
1
0
0
0
0
0
An
0
1
•••
0
A0
1
0
Preliminary
Dx
x
x
•••
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or V
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all Erase/Write
functions
operations. Execution of a READ instruction is
independent of both the EWEN and EWDS instructions.
The output data bits will toggle on the rising edge of the
CLK and are stable after the specified time delay (T
Sequential read is possible when CS is held high. The
memory data will automatically cycle to the next register
and output sequentially.
•••
•••
D0
CC
is removed from the device.
Dx
and
x
x
•••
T
T
CSL
CSL
should
D0
Dx
follow
•••
all
DS21797H-page 9
D0
programming
PD
).