CY62128ELL-55ZAXE Cypress Semiconductor Corp, CY62128ELL-55ZAXE Datasheet - Page 6
![IC SRAM 1MBIT 55NS 32STSOP](/photos/7/23/72388/428-32-tsop_sml.jpg)
CY62128ELL-55ZAXE
Manufacturer Part Number
CY62128ELL-55ZAXE
Description
IC SRAM 1MBIT 55NS 32STSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet
1.CY62128ELL-45SXI.pdf
(14 pages)
Specifications of CY62128ELL-55ZAXE
Memory Size
1M (128K x 8)
Package / Case
32-sTSOP
Format - Memory
RAM
Memory Type
SRAM
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Access Time
55 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
35 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY62128ELL-55ZAXE
Manufacturer:
CYPRESS
Quantity:
2 300
Switching Characteristics
Notes
Document #: 38-05485 Rev. *H
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
12. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3ns (1V/ns) or less, timing reference levels of 1.5V, input pulse
13. At any given temperature and voltage condition, t
14. t
15. The internal Write time of the memory is defined by the overlap of WE, CE = V
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
levels of 0 to 3V, and output loading of the specified I
terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that terminates the write.
HZOE
Parameter
, t
HZCE
[15]
, and t
HZWE
transitions are measured when the outputs enter a high impedance state.
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE
CE
CE
CE
Write Cycle Time
CE
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
1
1
1
1
1
1
LOW and CE
LOW and CE
HIGH or CE
LOW and CE
HIGH or CE
LOW and CE
(Over the Operating Range)
Description
2
2
HZCE
2
2
2
2
[13]
LOW to High-Z
LOW to Power Down
[13, 14]
[13]
[13, 14]
HIGH to Data Valid
HIGH to Low-Z
HIGH to Power Up
HIGH to Write End
OL
is less than t
/I
OH
as shown in the
LZCE
[13, 14]
, t
[13]
HZOE
“”
IL
on page 5.
is less than t
. All signals must be ACTIVE to initiate a write and any of these signals can
[12]
45 ns (Ind’l/Auto-A)
Min
45
10
10
45
35
35
35
25
10
5
0
0
0
0
LZOE
, and t
Max
45
45
22
18
18
45
18
HZWE
is less than t
Min
55 ns (Auto-E)
55
10
10
55
40
40
40
25
10
0
5
0
0
0
LZWE
CY62128E MoBL
for any given device.
Max
55
55
25
20
20
55
20
Page 6 of 14
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
®
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