MC68HC908GR8CD Freescale Semiconductor, MC68HC908GR8CD Datasheet - Page 69

• Manufacturer Part Number: MC68HC908GR8CD
• Description: 8-bit Microcontrollers - MCU 8 Bit 8MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908GR8CD

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: HC08
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 384 B
• Operating Supply Voltage: 3 V to 5 V
• Package / Case: SOIC-28
• Mounting Style: SMD/SMT
• Data Rom Size: 64 KB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 21
• Program Memory Type: Flash

Chapter 7
Clock Generator Module (CGMC)
7.1 Introduction
This section describes the clock generator module. The CGMC generates the crystal clock signal,
CGMXCLK, which operates at the frequency of the crystal. The CGMC also generates the base clock
signal, CGMOUT, which is based on either the crystal clock divided by two or the phase-locked loop (PLL)
clock, CGMVCLK, divided by two. In user mode, CGMOUT is the clock from which the SIM derives the
system clocks, including the bus clock, which is at a frequency of CGMOUT/2. In monitor mode, PTC3
determines the bus clock. The PLL is a fully functional frequency generator designed for use with crystals
or ceramic resonators. The PLL can generate an 8-MHz bus frequency using a 32-kHz crystal.
7.2 Features
Features of the CGMC include:
7.3 Functional Description
The CGMC consists of three major submodules:
Figure 7-1
Freescale Semiconductor
•
•
•
•
•
•
•
•
•
•
•
Phase-locked loop with output frequency in integer multiples of an integer dividend of the crystal
reference
Low-frequency crystal operation with low-power operation and high-output frequency resolution
Programmable prescaler for power-of-two increases in frequency
Programmable hardware voltage-controlled oscillator (VCO) for low-jitter operation
Automatic bandwidth control mode for low-jitter operation
Automatic frequency lock detector
CPU interrupt on entry or exit from locked condition
Configuration register bit to allow oscillator operation during stop mode
Crystal oscillator circuit — The crystal oscillator circuit generates the constant crystal frequency
clock, CGMXCLK.
Phase-locked loop (PLL) — The PLL generates the programmable VCO frequency clock,
CGMVCLK.
Base clock selector circuit — This software-controlled circuit selects either CGMXCLK divided by
two or the VCO clock, CGMVCLK, divided by two as the base clock, CGMOUT. The SIM derives
the system clocks from either CGMOUT or CGMXCLK.
shows the structure of the CGMC.
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
69