SST25VF010A-33-4I-SAE Microchip Technology, SST25VF010A-33-4I-SAE Datasheet - Page 19
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SST25VF010A-33-4I-SAE
Manufacturer Part Number
SST25VF010A-33-4I-SAE
Description
IC FLASH SER 1MB 33MHZ SPI 8SOIC
Manufacturer
Microchip Technology
Specifications of SST25VF010A-33-4I-SAE
Memory Type
FLASH
Memory Size
1M (128K x 8)
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Format - Memory
FLASH
Speed
33MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Architecture
Sectored
Interface Type
4-Wire
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
10 mA
Mounting Style
SMD/SMT
Organization
4 KB x 32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST25VF010A-33-4I-SAE
Manufacturer:
SST
Quantity:
3
Part Number:
SST25VF010A-33-4I-SAE
Manufacturer:
SST
Quantity:
20 000
1 Mbit SPI Serial Flash
SST25VF010A
TABLE 9: C
TABLE 10: R
TABLE 11: AC O
©2006 Silicon Storage Technology, Inc.
Parameter
C
C
Symbol
N
T
I
Symbol
F
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LTH
DR
CLK
SCKH
SCKL
SCKR
SCKF
CES
CEH
CHS
CHH
CPH
CHZ
CLZ
DS
DH
HLS
HHS
HLH
HHH
HZ
LZ
OH
V
SE
BE
SCE
BP
OUT
IN
END
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. Maximum Serial Clock Rise and Fall times may be limited by T
2. Relative to SCK.
1
1
1
2
2
2
1
1
2
1
1
Parameter
Serial Clock Frequency
Serial Clock High Time
Serial Clock Low Time
Serial Clock Rise Time (slew rate)
Serial Clock Fall Time (slew rate)
CE# Active Setup Time
CE# Active Hold Time
CE# Not Active Setup Time
CE# Not Active Hold Time
CE# High Time
CE# High to High-Z Output
SCK Low to Low-Z Output
Data In Setup Time
Data In Hold Time
HOLD# Low Setup Time
HOLD# High Setup Time
HOLD# Low Hold Time
HOLD# High Hold Time
HOLD# Low to High-Z Output
HOLD# High to Low-Z Output
Output Hold from SCK Change
Output Valid from SCK
Sector-Erase
Block-Erase
Chip-Erase
Byte-Program
APACITANCE (T
ELIABILITY
PERATING
Description
Output Pin Capacitance
Input Capacitance
Parameter
Endurance
Data Retention
Latch Up
C
HARACTERISTICS
C
A
= 25°C, f=1 Mhz, other pins open)
HARACTERISTICS
V
DD
= 2.7-3.6V
Minimum Specification
Min
100
0.1
0.1
20
20
20
20
10
10
10
10
15
10
0
5
5
0
SCKH
19
20 MHz
and T
100 + I
10,000
100
SCKL
DD
Max
100
20
20
20
20
20
25
25
20
requirements.
Limits
Min
100
Test Condition
Cycles
0.1
0.1
13
13
12
12
10
10
10
10
10
10
Units
Years
0
3
3
0
mA
V
V
OUT
33 MHz
IN
= 0V
= 0V
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
Max
100
33
14
14
14
12
25
25
20
S71265-02-000
Maximum
12 pF
Data Sheet
6 pF
Units
MHz
V/ns
V/ns
ms
ms
ms
T10.0 1265
ns
ns
µs
T11.0 1265
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T9.0 1265
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