24LC02B-I/SNG Microchip Technology, 24LC02B-I/SNG Datasheet - Page 11

• Manufacturer Part Number: 24LC02B-I/SNG
• Description: IC EEPROM 2KBIT 400KHZ 8SOIC
• Manufacturer: Microchip Technology

Specifications of 24LC02B-I/SNG

• Memory Size: 2K (256 x 8)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 256 X 8
• Ic Interface Type: I2C
• Clock Frequency: 400kHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Package: 8SOIC N
• Interface Type: Serial-I2C
• Density: 2 Kb
• Maximum Operating Frequency: 0.4 MHz
• Maximum Random Access Time: 900 ns
• Typical Operating Supply Voltage: 3.3|5 V
• Organization: 256x8
• Data Retention: 200(Min) Year
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.0
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
• During data transfer, the data line must remain
Accordingly, the following bus conditions have been
defined (Figure 5-1).
5.1
Both data and clock lines remain high.
5.2
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
5.3
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
5.4
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between Start and Stop conditions is
determined by the master device.
© 2007 Microchip Technology Inc.
is not busy.
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
BUS CHARACTERISTICS
Bus Not Busy (A)
Start Data Transfer (B)
Stop Data Transfer (C)
Data Valid (D)
24AAXX/24LCXX/24FCXX
DS21930C-page 11