AT24HC02BN-SH-T Atmel, AT24HC02BN-SH-T Datasheet - Page 9

• Manufacturer Part Number: AT24HC02BN-SH-T
• Description: IC EEPROM 2KBIT 1MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT24HC02BN-SH-T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 400kHz, 1MHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Density: 2Kb
• Interface Type: Serial (2-Wire)
• Organization: 256x8
• Access Time (max): 900ns
• Frequency (max): 400KHz
• Write Protection: Yes
• Data Retention: 100Year
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Supply Current: 3mA
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT24HC02BN-10SU-1.8 SL383; AT24HC02BN-10SU-1.8 SL383

9. Write Operations
5192C–SEEPR–01/09
BYTE WRITE: A write operation requires an 8-bit data word address following the device
address word and acknowledgment. Upon receipt of this address, the EEPROM will again
respond with a “0” and then clock in the first 8-bit data word. Following receipt of the 8-bit data
word, the EEPROM will output a “0” and the addressing device, such as a microcontroller, must
terminate the write sequence with a stop condition. At this time the EEPROM enters an internally
timed write cycle, t
and the EEPROM will not respond until the write is complete (see
PAGE WRITE: The 2K EEPROM is capable of an 8-byte page write, and the 4K EEPROM
device is capable of 16-byte page writes.
A page write is initiated the same as a byte write, but the microcontroller does not send a stop
condition after the first data word is clocked in. Instead, after the EEPROM acknowledges
receipt of the first data word, the microcontroller can transmit up to seven (2K) or sixtenn (4K)
more data words. The EEPROM will respond with a “0” after each data word received. The
microcontroller must terminate the page write sequence with a stop condition (see
on page
The data word address lower three bits (2K) or four (4K) are internally incremented following the
receipt of each data word. The higher data word address bits are not incremented, retaining the
memory page row location. When the word address, internally generated, reaches the page
boundary, the following byte is placed at the beginning of the same page. If more than eight (2K)
or sixteen (4K) data words are transmitted to the EEPROM, the data word address will “roll over”
and previous data will be overwritten.
ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a
start condition followed by the device address word. The read/write bit is representative of the
operation desired. Only if the internal write cycle has completed will the EEPROM respond with
a “0”, allowing the read or write sequence to continue.
11).
WR
, to the nonvolatile memory. All inputs are disabled during this write cycle
AT24HC02B/04B
Figure 10-2 on page
Figure 10-3
10).
9