SST89E554RC-40-C-TQJ Microchip Technology, SST89E554RC-40-C-TQJ Datasheet - Page 36
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SST89E554RC-40-C-TQJ
Manufacturer Part Number
SST89E554RC-40-C-TQJ
Description
8-bit Microcontrollers - MCU 32KB+8KB 40ns
Manufacturer
Microchip Technology
Datasheet
1.SST89E564RD-40-I-NJE.pdf
(90 pages)
Specifications of SST89E554RC-40-C-TQJ
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
32 KB
Data Ram Size
1 KB
On-chip Adc
No
Operating Supply Voltage
4.5 V to 5.5 V
Package / Case
TQFP-44
Mounting Style
SMD/SMT
Data Rom Size
128 B
Interface Type
SPI, UART
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
On-chip Dac
No
Processor Series
FlashFlex
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
EOL Data Sheet
4.1.1 Product Identification
The Read-ID command accesses the Signature Bytes that
identify the device and the manufacturer as SST. External
programmers primarily use these Signature Bytes in the
selection of programming algorithms. The Read-ID com-
mand is selected by the command code of 0H on P3[7:6]
and P2[7:6]. See Figure 13-14 for timing waveforms.
TABLE
4.1.2 Arming Command
An arming command sequence must take place before
any external host mode sequence command is recognized
by the device. This prevents accidental triggering of exter-
nal host mode commands due to noise or programmer
error. The arming command is as follows:
After the above sequence, all other external host mode
commands are enabled. Before the Read-ID command is
received, all other external host mode commands received
are ignored.
4.1.3 External Host Mode Commands
The external host mode commands are Read-ID, Chip-
Erase, Block-Erase, Sector-Erase, Byte-Program, Byte-
Verify, Prog-SB1, Prog-SB2, Prog-SB3, Prog-SC0, Prog-
SC1, Select-Block0, Select-Block1. See Tables 4-1 and 4-2
for all signal logic assignments, Figure 4-1 for I/O pin
assignments, and Table 13-11 for the timing parameters.
The critical timing for all Erase and Program commands is
generated by an on-chip flash memory controller. The high-
to-low transition of the PROG# signal initiates the Erase or
Program commands, which are synchronized internally.
The Read commands are asynchronous reads, indepen-
dent of the PROG# signal level.
A detailed description of the external host mode com-
mands follows.
©2007 Silicon Storage Technology, Inc.
Manufacturer’s ID
Device ID
1. PSEN# goes low while RST is high. This will get
2. A Read-ID command is issued, and after 1 ms the
SST89E564RD
SST89V564RD
SST89E554RC
SST89V554RC
the machine in external host mode, re-configuring
the pins, and turning on the on-chip oscillator.
external host mode commands can be issued.
4-3: P
RODUCT
I
DENTIFICATION
Address
30H
31H
31H
31H
31H
T4-3.0 1207
Data
BFH
91H
90H
99H
98H
36
The Select-Block0 command enables Block 0 to be pro-
grammed in external host mode. Once this command is
executed, all subsequent external host Commands will be
directed at Block 0. See Figure 13-15 for timing waveforms.
This
SST89V564RD only.
The Select-Block1 command enables Block 1 (8 KByte
Block) to be programmed. Once this command is exe-
cuted, all subsequent external host Commands that are
directed to the address range below 2000H will be directed
at Block 1. The Select-Block1 command only affects the
lowest 8 KByte of the program address space. For
addresses greater than or equal to 2000H, Block 0 is
accessed by default. Upon entering external host mode,
Block 1 is selected by default. See Figure 13-15 for timing
waveforms. This command applies to SST89E564RD/
SST89V564RD only.
The Chip-Erase, Block-Erase, and Sector-Erase com-
mands are used for erasing all or part of the memory array.
Erased data bytes in the memory array will be erased to
FFH. Memory locations that are to be programmed must
be in the erased state prior to programming.
The Chip-Erase command erases all bytes in both memory
blocks, regardless of any previous Select-Block0 or Select-
Block1 commands. Chip-Erase ignores the Security Lock
status and will erase the Security Lock, returning the device
to its Unlocked state. The Chip-Erase command will also
erase the SC0 bit. Upon completion of Chip-Erase com-
mand, Block 1 will be the selected block. See Figure 13-16
for timing waveforms.
The Block-Erase command erases all bytes in the selected
memory blocks. This command will not be executed if the
security lock is enabled. The selection of the memory block
to be erased is determined by the prior execution Select-
Block0 or Select-Block1 command. See Figures 13-17 and
13-18 for the timing waveforms.
The Sector-Erase command erases all of the bytes in a
sector. The sector size for the flash memory is 128 Bytes.
This command will not be executed if the Security lock is
enabled. See Figure 13-19 for timing waveforms.
The Byte-Program command is used for programming new
data into the memory array. Programming will not take
place if any security locks are enabled. See Figure 13-20
for timing waveforms.
The Byte-Verify command allows the user to verify that the
device correctly performed an Erase or Program com-
mand. This command will be disabled if any security locks
are enabled. See Figure 13-23 for timing waveforms.
command
SST89E564RD / SST89V564RD
SST89E554RC / SST89V554RC
applies
to
FlashFlex MCU
S71207-08-EOL
SST89E564RD/
1/07