MAX6841IUKD3+T Maxim Integrated, MAX6841IUKD3+T Datasheet - Page 17
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MAX6841IUKD3+T
Manufacturer Part Number
MAX6841IUKD3+T
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX6841, MAX6842, MAX6843, MAX6844, MAX6845r
Datasheet
1.MAX6841IUKD4T.pdf
(24 pages)
Specifications of MAX6841IUKD3+T
Number Of Voltages Monitored
1
Monitored Voltage
0.9 V to 1.5 V
Undervoltage Threshold
1.35 V
Overvoltage Threshold
1.425 V
Output Type
Active High, Active Low, Push-Pull
Manual Reset
Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
280 ms
Supply Voltage - Max
1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-23
Chip Enable Signals
No
Maximum Power Dissipation
571 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Supply Current (typ)
8.1 uA
Supply Voltage - Min
0.75 V
Figure 2. Inductor Current Waveform
The maximum allowable voltage change during a tran-
sient is fixed by the supply range of the CPU (V
V
tolerates twice the ESR in the output capacitors.
Because the ESR specification is achieved by parallel-
ing several capacitors, fewer capacitors are needed for
the voltage-positioned circuit. Figure 4 shows transient
response regions.
An additional benefit of voltage positioning is reduced
power consumption at high-load currents. Because the
output voltage is lower under heavy load, the CPU
draws less current. The result is lower power dissipa-
tion in the CPU.
A 2V reference is provided on the MAX1937/MAX1938/
MAX1939 through the REF pin. REF is capable of
sourcing or sinking up to 50µA. In addition to providing
a reference for the IC, REF is used for setting the cur-
rent limit and voltage positioning. Connect a 0.47µF
capacitor from REF to GND. This capacitor should be
placed as close as possible to the REF pin.
A UVLO is provided for the reference voltage. The ref-
erence voltage must rise above 1.600V to activate the
controller. The controller is disabled if the reference
voltage falls below 1.584V.
When EN is low, DL_ and DH_ are held low (turning off
the MOSFETs), leaving LX_ high impedance. In addi-
tion, the reference is turned off and PWRGD is pulled
low. In shutdown, total current consumption is about
50µA (typ).
P-P2
). This means that the voltage-positioned circuit
Enable Input (EN) and Soft-Start
______________________________________________________________________________________
Controllers with Controlled VID Change
Voltage Reference (REF)
Two-Phase Desktop CPU Core Supply
TIME
I
I
I
PEAK
LOAD
VALLEY
P-P1
=
In the case of shutdown by VID code, only DL_ and
DH_ are held low. The rest of the controller is enabled.
When EN is driven high, the startup sequence begins.
Once the reference voltage rises above its 1.6V UVLO
threshold, the controller begins switching and starts to
ramp up the output voltage. The output voltage is
ramped up in 25mV steps every 50µs until the output
reaches the nominal output voltage.
The MAX1937/MAX1938/MAX1939 contain internal cir-
cuitry to protect themselves and surrounding circuitry
from damage from output overvoltage and output
undervoltage conditions. When either of these condi-
tions occurs, DH_ is pulled low, DL_ is driven high, and
PWRGD is pulled low. These pins remain in this state
until either power is cycled on V
high-low-high.
An internal DAC is used to set the output regulation
voltage. A 5-bit code on inputs VID0–VID4 is used to
specify the output voltage. Some codes disable the
output. There is an internal 100kΩ pullup resistor to
VDD on each of the VID_ inputs. Connecting VID_ to
GND sets the bit to logic low (0); connecting VID_ to
VDD or leaving it unconnected sets the bit to logic high
(1). Use external pullup resistors to speed the low-to-
high logic transition, or for lower logic voltages. See
Table 1 for a list of codes and corresponding output
regulation voltages for each of the parts.
The VID_ codes for the MAX1937 comply with AMD
Hammer code. The VID_ codes on the MAX1938 are
Figure 3. Voltage-Positioning and Nonvoltage-Positioning
Waveforms
1.4V
1.4V
Setting the Output Voltage (VID_)
VOLTAGE POSITIONING THE OUTPUT
A. CONVENTIONAL CONVERTER (50mV/div)
B. VOLTAGE-POSITIONED OUTPUT (50mV/div)
Fault Conditions
DD
or EN is toggled
A
B
17