AT88SC1608-09ET-00 Atmel, AT88SC1608-09ET-00 Datasheet - Page 13

• Manufacturer Part Number: AT88SC1608-09ET-00
• Description: IC EEPROM 16KBIT 1MHZ M2E
• Manufacturer: Atmel
• Series: CryptoMemory®r

Specifications of AT88SC1608-09ET-00

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 16K (2K x 8)
• Speed: 1MHz
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: M2 E, Smart Card Module
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.9
Figure 10-9. Verify Authentication
Note:
11. Device Operation
11.1
11.2
11.3
0971H–SMEM–6/08
S
T
A
R
T
Verify Authentication
Q1: Host challenge, 8 bytes
Clock and Data Transitions
Start Condition
Stop Condition
1 0 1 1 0 1 1 0
Command
The initialize authentication command sets up the random generator with the cryptogram (Ci),
the secret seed (Gc), and the host random number (Q0). Once the sequence is completed and a
stop condition is issued, there is a nonvolatile write cycle to write a new bit of the 8-bit AAC to
“0”. In order to complete the authentication protocol, the device requires the host to perform an
ACK polling sequence with the specific device address of $B7, corresponding to the verify
authentication command.
If Q1 is equal to Ci + 1, then the device writes Ci + 2 in memory in place of Ci; this must be pre-
ceded by the initialize authentication command. Once the sequence is completed and a stop
condition is issued, there is a nonvolatile write cycle to update the associated attempts counter.
In order to know whether or not the authentication was correct, the device requires the host to
perform an ACK polling sequence with the specific device address of $B5 to read the AAC in the
configuration zone. A valid authentication will result in the AAC cleared to $FF. An invalid
authentication attempt will initiate a nonvolatile write cycle, but no clear operation will be per-
formed on the AAC.
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change
only during SCL-low time periods (see
will indicate a start or stop condition as defined below.
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (see
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the device in a standby power mode (see
A
C
K
D 7
Figure
Q1(0)
–
11-1).
D 0
A
C
K
D 15
Figure
Q1(1)
–
11-2). Data changes during SCL-high time periods
D 8
A
C
K
. . .
D 63
Figure
AT88SC1608
Q1(7)
–
11-1).
D 56
A
C
K
S
T
O
P
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