EA-LCD-006 Embedded Artists, EA-LCD-006 Datasheet - Page 14

• Manufacturer Part Number: EA-LCD-006
• Description: Display Development Tools 7" TFT 800 x 480 LCD BOARD
• Manufacturer: Embedded Artists

Specifications of EA-LCD-006

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AT070TN84
• Interface Type: I2C, IDC
• Operating Supply Voltage: 3.3 V, 5 V
• Description/function: On-Board Module
• Dimensions: 165 mm x 150 mm
• Factory Pack Quantity: 1
• Viewing Area: 7 in

Copyright 2012 © Embedded Artists AB
LCD Board - User’s Guide
};
static eaLcdbTouchParams_t touchParam =
{
};
static char* initSeqStr = "v1,cd0,cc0,c30,d100,c31,d100,cd1,d10,o,cc100";
static char* pdSeqStr
static char* lcdName
static char* lcdMfg
4.4.2
It is recommended to generate the highest possible internal pixel clock from the LPC LCD controller.
According to the datasheet a minimum clock frequency of 32.4MHz is needed, but 30MHz will work
just fine. Do not use the on-board 40MHz oscillator (on rev A of the LCD Board) to generate the pixel
clock. The clock frequency is too high for the LCD controllers on most LPC processors.
The code listing below contains the LCD controller settings for the controller that is used on many LPC
processors. It also lists parameters about the touch screen and startup/power down behavior for the
general driver that Embedded Artists has created.
static const LCD_PARAM_T lcdParams =
{
};
static eaLcdbTouchParams_t touchParam =
{
};
static char* initSeqStr = "v1,cc0,c31,d50,o,d200,c51,cc100";
static char* pdSeqStr
static char* lcdName
static char* lcdMfg
9000000,
TFT,
0,
630, // x resistance
250, // y resistance
800,
480,
36000000,
TFT,
0,
775, // x resistance
350, // y resistance
16,
45,
17,
22,
22,
16,
1,
1,
0,
2,
2,
0,
0,
1,
1,
1,
0,
// don't swap
// don't swap
Note about 7.0 inch LCD (EA-LCD-006)
/* Horizontal back porch */
/* Horizontal front porch */
/* HSYNC pulse width */
/* Pixels per line */
/* Vertical back porch */
/* Vertical front porch */
/* VSYNC pulse width */
/* Lines per panel */
/* Invert output enable */
/* Do not invert panel clock */
/* Invert HSYNC */
/* Invert VSYNC */
/* AC bias frequency (not used) */
/* Bits per pixel */
/* Optimal clock rate (Hz) between 32.4-43.0 MHz according to DS */
/* LCD panel type */
/* Single panel display */
/* Invert VSYNC */
/* AC bias frequency (not used) */
/* Bits per pixel */
/* Optimal clock rate (Hz) */
/* LCD panel type */
/* Single panel display */
= "v1,cd0,d1,cc0,q,c30";
= "HSD043I9W1-A00-0299";
= "Hannstar";
= "v1,c50,d200,q,d50,c30";
= "AT070TN84-02";
= "Innolux";
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