AT28C64B-15JU Atmel, AT28C64B-15JU Datasheet

IC EEPROM 64KBIT 150NS 32PLCC

AT28C64B-15JU

Manufacturer Part Number
AT28C64B-15JU
Description
IC EEPROM 64KBIT 150NS 32PLCC
Manufacturer
Atmel
Datasheets

Specifications of AT28C64B-15JU

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
150ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-PLCC
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
10 μA
Current, Operating
40 mA
Current, Output, Leakage
10
Data Retention
10 yrs.
Density
64K
Organization
8K×8
Package Type
PLCC
Power Dissipation
220 mW
Temperature, Operating
-40 to +85 °C
Time, Access
150 ns
Time, Address Hold
50
Voltage, Input, High
2 V
Voltage, Input, Low
0.8 V
Voltage, Output, High
2.4 V
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
1. Description
The AT28C64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28C64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
Atmel’s AT28C64B has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 150 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 10 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
64K (8K x 8)
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28C64B

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AT28C64B-15JU Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability + 0.6V CC Condition MHz OUT -400 µA OH AT28C64B WE I OUT High High Z V High Z IL Min Max Units 10 µA 10 µA 100 µ ...

Page 3

... whichever occurs first ( This parameter is characterized and is not 100% tested. AT28C64B 6 (1)(2)(3)(4) ADDRESS VALID ACC HIGH Z OUTPUT VALID - t after the address transition without impact after the falling edge of CE without impact pF). L AT28C64B-15 Min Max Units 150 ns 150 ACC ...

Page 4

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested < Max 6 12 AT28C64B Units Conditions OUT 7 ...

Page 5

... AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28C64B 8 t OES OES Min Max ...

Page 6

... A6 through A12 must specify the same page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. 18. Chip Erase Waveforms (min 12.0V ±0.5V H (1)(2) t WPH VALID ADD t DS VALID DATA µs (min.) H AT28C64B Min Max 100 150 50 t BLC Units µ ...

Page 7

... Toggling either both OE and CE will operate toggle bit. 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. (1) See “AC Read Characteristics” on page 6. t OEH t OE (1) (1)(2)( OEH OEHP AT28C64B Min Typ Max Min Typ Max 10 10 150 Units ...

Page 8

... Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28-lead, Plastic Thin Small Outline Package (TSOP) (1) Ordering Code AT28C64B-15JI AT28C64B-15PI AT28C64B-15SI AT28C64B-15TI Ordering Code AT28C64B-15JU AT28C64B-15SU AT28C64B-15TU AT28C64B-15PU Package and Temperature Combinations JI, JU, PI, SI, SU, TI, TU, PU Package Type AT28C64B Package Operation Range ...

Page 9

... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. TITLE 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER ...

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