MAX5988BEVKIT# Maxim Integrated, MAX5988BEVKIT# Datasheet - Page 13

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MAX5988BEVKIT#

Manufacturer Part Number
MAX5988BEVKIT#
Description
Power Management IC Development Tools MAX5988B Eval Kit
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX5988BEVKIT#

Rohs
yes
The devices feature a sleep mode and an ultra-low-
power mode in which the internal p-channel isolation
MOSFET is kept on and the buck regulator is off. In sleep
mode, the LED driver output (LED) pulse width modu-
lates the LED current with a 25% duty cycle. The peak
LED current (I
enable sleep mode, apply a falling edge to SL with ULP
disconnected or high impedance. Sleep mode can only
be entered from wake mode.
Ultra-low-power mode allows the devices to reduce
power consumption lower than sleep mode, while main-
taining the power signature of the IEEE standard. The
ultra-low-power-mode enable input ULP is internally held
high with a 50kω pullup resistor to the internal 5V bias of
the device. To enable ultra-low-power mode, apply a fall-
ing edge to SL with ULP = LOW. Ultra-low-power mode
can only be entered from wake mode.
To exit from sleep mode or ultra-low-power mode and
resume normal operation, apply a falling edge on the
wake-mode enable input (WK).
If the devices’ die temperature reaches 151°C, an over-
temperature fault is generated and the device shuts
down. The die temperature must cool down below
+135°C to remove the overtemperature fault condition.
After a thermal shutdown condition clears, the device is
reset.
For applications where an auxiliary power source such
as a wall power adapter is used to power the PD, the
devices feature wall power adapter detection.
The wall power adapter is connected from WAD to PGND.
The devices detect the wall power adapter when the volt-
age from WAD to PGND is greater than 8.8V. When a wall
power adapter is detected, the internal isolation MOSFET
is turned off, classification current is disabled.
Connect the auxiliar power source to WAD, connect a
diode from WAD to V
to V
and 4.
The application circuit must ensure that the auxiliary
power source can provide power to V
Maxim Integrated
IEEE 802.3af-Compliant, High-Efficiency, Class 1/Class 2,
CC
Powered Devices with Integrated DC-DC Converter
. See the typical application circuit in
Sleep and Ultra-Low-Power Modes
LED
) is set by an external resistor R
Thermal-Shutdown Protection
DD
, and connect a diode from WAD
WAD Description
DD
and V
Figures 3
CC
SL
. To
by
means of external diodes. The voltage on V
within the V
ate. To allow operation of the DC-DC converter, the V
and V
edge, while on the falling edge the V
down to 7.7V keeping the DC-DC converter on.
Note: When operating solely with a wall power adapter,
the WAD voltage must be able to meet the condition V
> 8.8V, that likely results in WAD > 8.8V.
An internal voltage regulator provides VDRV to internal
circuitry. The VDRV output is filtered by a 1µF capaci-
tor connected from VDRV to GND. The regulator is for
internal use only and cannot be used to provide power to
external circuits. VDRV can be powered by either V
V
for both PD and buck converter operations.
V
lator if V
increases device efficiency by drawing current from
V
connect AUX directly to V
VDRV source switches from V
converter’s output has reached its regulation voltage.
A 70V voltage clamp is integrated to protect the internal
circuits from a cable discharge event.
The DC-DC buck converter uses a PWM, peak current-
mode, fixed-frequency control scheme providing an
easy-to-implement architecture without sacrificing a fast
transient response. The buck converter operates in a
wide input voltage range from 8.8V to 60V and supports
up to 6.49W of output power at 1.3A load. The devices
provide a wide array of protection features including
UVLO, overtemperature shutdown, short-circuit protec-
tion with hiccup runaway current limit, cycle-by-cycle
peak current protection, and cycle-by-cycle output over-
voltage protection, for enhanced performance and reli-
ability. A frequency foldback scheme is implemented to
reduce the switching frequency to half at light loads to
increase the efficiency.
AUX
OUT
OUT
MAX5988A/MAX5988B
Internal Linear Regulator and Back Bias
, depending on V
Cable Discharge Event Protection (CDE)
CC
can be used to back bias the VDRV voltage regu-
instead of V
OUT
voltage must be greater than 8V, on the rising
DD
is greater than 4.75V. Back biasing VDRV
voltage range to allow the DC-DC to oper-
DD
. If V
AUX
. The internal regulator is used
OUT
DC-DC Buck Converter
OUT
DD
. In this configuration, the
is used as back bias,
to V
DD
AUX
and V
after the buck
DD
CC
must be
may fall
DD
DD
DD
13
or

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