MAX17039EVKIT+ Maxim Integrated, MAX17039EVKIT+ Datasheet - Page 18

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MAX17039EVKIT+

Manufacturer Part Number
MAX17039EVKIT+
Description
Power Management IC Development Tools Dual-Output 3-Phase + 1 Phase Quick-PWM Controller for VR12/IMVP-7
Manufacturer
Maxim Integrated
Series
MAX17039r
Datasheet
MAX17039 Evaluation Kit
The MAX17039 includes a transconductance amplifier
for adding gain to the voltage-positioning sense path.
The amplifier’s input is generated by summing the cur-
rent-sense inputs, which differentially sense the voltage
across the inductor’s DCR. The transconductance ampli-
fier’s output connects to the voltage-positioned feedback
input (FBA), so the resistance between FBA and V
(R17) determines the voltage-positioning gain. Resistor
R17 (3.83kI) provides a -1.9mV/A voltage-positioning
slope at the CPU output. Also, the resistance between
FBB and VCCGT (R75) determines the voltage-position-
ing gain for the GPU output. Resistor R75 (8.06kI) pro-
vides a -3.9mV/A voltage-positioning slope at the GPU
output. Remote output and ground sensing eliminate any
additional PCB voltage drops.
When VR_ENABLE goes low (JU4 = GND), the MAX17039
enters the low-power shutdown mode. VRA_READY and
VRB_ READY are pulled low immediately, and both out-
put voltages ramp down at 1.2mV/Fs slew rate. When the
controller reaches the 0V target, the drivers are disabled
(DH_ and DL_ driven low), the reference is turned off,
and the IC supply currents drop to 15FA (max).
When a fault condition activates the shutdown sequence
(output undervoltage lockout or thermal shutdown), the
protection circuitry sets the fault latch to prevent the
controller from restarting. To clear the fault latch and
reactivate the MAX17039, toggle VR_ENABLE or cycle
V
The MAX17039 EV kit also demonstrates the MAX17000
DDR memory-power solution circuit. The MAX17000
provides the regulated voltages required in a complete
DDR memory system. The MAX17000 generates the
main-memory voltage (VCCDDR), the tracking sinking/
sourcing termination voltage (VTTDDR), and the refer-
ence voltage (VTTR). The MAX17000 circuit operates at
400kHz switching frequency, generates a preset 1.5V
VCCDDR main-memory voltage that can source 10A
Table 2. Shutdown Mode (VR_ENABLE)
*Default position.
18
DD
Not installed*
JU4 SHUNT
POSITION
Installed
_____________________________________________________________________________________
power.
Evaluating the MAX17000 Circuit
Connected to GND
Connected to VCC
VR_ENABLE PIN
Reduced Power-Dissipation
Jumper JU4 Settings
Shutdown Control Input
Voltage Positioning
Shutdown mode (V
Outputs enabled (V
OUT
OUT
OUT
= 0V and VCCGT = 0V)
and VCCGT are programmed by the 3-wire serial VID interface)
from a 7V to 20V battery-input range. The termination
regulator provides a 0.75V VTTDDR supply that can sink/
source 2A. The termination reference buffer provides a
0.75V VTTR supply that can sink/source 3mA.
The MAX17000 feedback input (FB) is connected to a
network of resistors that set the VCCDDR output voltage.
By default, the output voltage is preset to a fixed 1.5V
output (R120 = 0I). For a fixed 1.8V output, remove
R120 and install a short across resistor R51. For an
adjustable VCCDDR output (1V to 2.7V), connect FB to
resistive-divider R119 and R120 from the output-voltage
VCCDDR. Install feedback resistors with values accord-
ing to the following equation:
where VFB = 1V. Use 10kI for R120 and calculate R119
for the desired VCCDDR output voltage.
The MAX17000 features independent standby and shut-
down controls by implementing jumpers JU5 and JU6
to control the STDBY and SHDN inputs, respectively.
Jumpers JU5 and JU6 allow flexible sequencing to
support all DDR operating states. The shutdown and
standby control logic is illustrated in Table 3.
Table 3. JU5 (STDBY) and JU6 (SHDN)
Functions
X = Don’t care.
*Default position.
(STDBY)
Installed*
installed
MAX17000 Standby Control Input (STDBY)
SHUNT POSITION
JU5
Not
X
MAX17039 OUTPUT
Setting the VCCDDR Output Voltage
and Shutdown Control Input (SHDN)
Installed*
Installed
installed
(SHDN)
JU6
VCCDDR = VFB 1
Not
VCCDDR
OUTPUT
Disabled
Enabled
Enabled
+
R119
R120
VTTDDR
Disabled
Disabled
Enabled
Disabled
Enabled
Enabled
VTTR

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