MAX4940EVKIT+ Maxim Integrated, MAX4940EVKIT+ Datasheet - Page 7

• Manufacturer Part Number: MAX4940EVKIT+
• Description: Power Management IC Development Tools Maxim Evaluation Kit
• Manufacturer: Maxim Integrated
• Series: MAX4940, MAX4940Ar

The EPM1270F256C5N (U1) is from Altera’s MAX II fam-
ily of CPLDs. Contact Altera for any questions regarding
the CPLD. See the Component Suppliers table for con-
tact information.
The MAX8869 (U2) is a high-current, low-dropout (LDO)
linear regulator, preset to 3V output. This regulator sup-
plies the CPLD and the MAX4940 EV kit VDD supply.
The MAX4940 Master Board firmware is controlled by
pushbutton switches SW1–SW7. SW1 toggles between
run and stop mode. Pressing and releasing SW2 selects
the waveform. Pressing and releasing SW3 selects the
burst frequency. SW4 selects the number of times to
repeat the waveform. Pressing SW7 resets the MAX4940
Master Board configuration to run waveform A at the fast-
est burst clock, one pulse every 50Fs.
Every 50Fs the MAX4940 Master Board self-triggers the
selected waveform. The waveform data is determined by
Table_2._MAX4940A_Jumper_Descriptions_(JU1–JU13)
*Default position.
JUMPER
JU10
JU11
JU12
JU13
JU1
JU2
JU3
JU4
JU5
JU6
JU7
JU8
JU9
OUT1A, OUT2A
OUT1B, OUT2B
VNN1, VNN2
VPP1, VPP2
Load-1A
Load-2A
Load-2B
Load-1B
SIGNAL
CLP1A
CLP2A
CLP2B
CLP1B
________________________________________________________________________________________ _ 7
EN
MAX4940 Evaluation Kit/Master Board
Pushbutton Switch Operation
MAX4940 Master Board
SHUNT_POSITION
Open*
Open*
Open*
Open*
Open
Open
Open
Open
Open
Open
Open
1-2*
1-2*
1-2*
1-2*
1-2*
1-2
1-2
Enable input EN connects to VDD, enabling the high-voltage outputs for
normal operation
Enable input EN is not connected to VDD (required when driven with
MAX4940 Master Board, or other external signal source)
CLP1A is not connected to VDD (required when U1 = MAX4940A)
CLP2A is not connected to VDD (required when U1 = MAX4940A)
CLP2B is not connected to VDD (required when U1 = MAX4940A)
CLP1B is not connected to VDD (required when U1 = MAX4940A)
VNN1 and VNN2 are independent (required when U1 = MAX4940A)
VPP1 and VPP2 are independent (required when U1 = MAX4940A)
OUT1A and OUT2A are connected together (required when U1 =
MAX4940A)
OUT1B and OUT2B are connected together (required when U1 =
MAX4940A)
Dummy load ROUT1/COUT1 connects to OUT1A
Dummy load ROUT1/COUT1 is disconnected
Dummy load ROUT2/COUT2 and in connects to OUT2A
Dummy load ROUT2/COUT2 is disconnected
Dummy load ROUT3/COUT3 connects to OUT2B
Dummy load ROUT3/COUT3 is disconnected
Dummy load ROUT4/COUT4 connects to OUT1B
Dummy load ROUT4/COUT4 is disconnected
SW2. The burst frequency is determined by SW3, and
the number of times the waveform repeats is determined
by SW4. Waveform E automatically activates continuous-
wave mode, repeating the waveform continuously. For
waveform E, the enable output EN is driven with a 10%
duty-cycle signal with approximately a 100ms period.
The use of an oscilloscope is recommended to confirm
that the correct operation mode is selected.
With power disconnected, replace U1 with the MAX4940A
IC. Configure the jumpers according to Table 2. Jumpers
JU2–JU7 must be open. Move the shunts from JU6
and JU7 to JU8 and JU9. Follow the steps in the
Quick Start section except a signal source must be used
in place of the master board. In addition, use two separate
power supplies for VPP1/VNN1 and VPP2/VNN2. Refer to
the MAX4940A IC data sheet for more information.
DESCRIPTION
Evaluating the MAX4940A