M25PX16-VMN6TP NUMONYX, M25PX16-VMN6TP Datasheet - Page 51

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M25PX16-VMN6TP

Manufacturer Part Number
M25PX16-VMN6TP
Description
IC FLASH 16MBIT 75MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25PX16-VMN6TP

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (2M x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M25PX16-VMN6TPTR

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Table 18.
1. 75 MHz operations are allowed only on the VCC range 2.7 V - 3.6 V.
2. Typical values given for T
3. t
4. Value guaranteed by characterization, not 100% tested in production.
5. Expressed as a slew-rate.
6. Only applicable as a constraint for a WRSR instruction when SRWD is set at ‘1’.
7. V
8. When using the Page Program (PP) instruction to program consecutive bytes, optimized timings are obtained with one
9. int(A) corresponds to the upper integer part of A. For example, int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
t
VPPHSL
Symbol
t
t
t
t
t
HHQX
WHSL
SHWL
SHQZ
t
HLQZ
t
t
t
t
t
t
t
t
RDP
t
t
t
known. Avoid applying V
sequence including all the bytes versus several sequences of only a few bytes (1 ≤ n ≤ 256).
CHHH
HHCH
CHSH
SHCH
CLQV
CLQX
HLCH
CHHL
SHSL
DP
PP
t
CH
SSE
t
t
PPH
t
SE
BE
W
(4)
(8)
+ t
(4)
(4)
(4)
(4)
(6)
(6)
should be kept at a valid level until the program or erase operation has completed and its result (success or failure) is
(7)
CL
must be greater than or equal to 1/ f
AC characteristics
t
Alt.
t
t
CSH
t
t
DIS
HO
t
HZ
LZ
V
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output Disable time
Clock Low to Output valid under 30 pF
Clock Low to Output valid under 10 pF
Output hold time
HOLD setup time (relative to C)
HOLD hold time (relative to C)
HOLD setup time (relative to C)
HOLD hold time (relative to C)
HOLD to Output Low-Z
HOLD to Output High-Z
Write Protect setup time
Write Protect hold time
Enhanced Program supply voltage High
(V
S High to Deep Power-down mode
S High to Standby mode
Write Status Register cycle time
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
Program OTP cycle time (64 bytes)
Subsector Erase cycle time
Sector Erase cycle time
Bulk Erase cycle time
PPH
PPH
A
) to Chip Select Low
= 25° C.
to the W/VPP pin during Bulk Erase.
Test conditions specified in
(1)
(continued)
Parameter
C
.
Table 14
and
Min
200
100
80
20
0
5
5
5
5
5
5
Table 15
int(n/8) × 0.025
Typ
1.3
0.8
0.2
0.6
70
15
(2)
(9)
Max
150
30
15
80
8
8
6
8
8
3
5
3
Unit
ms
ms
ms
ms
51/65
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
s
s

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