M27C801-100B1 STMicroelectronics, M27C801-100B1 Datasheet - Page 8

IC OTP 8MBIT 100NS 32DIP

M27C801-100B1

Manufacturer Part Number
M27C801-100B1
Description
IC OTP 8MBIT 100NS 32DIP
Manufacturer
STMicroelectronics
Datasheets

Specifications of M27C801-100B1

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
8M (1M x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-DIP (0.600", 15.24mm)
Organization
1Mx8
Interface Type
Parallel
In System Programmable
External
Access Time (max)
100ns
Package Type
PDIP
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
50mA
Pin Count
32
Mounting
Through Hole
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Capacitance, Input
6 pF
Capacitance, Output
12 pF
Current, Input, Leakage
±10 μA
Current, Operating
35 mA
Current, Output, Leakage
±10
Current, Supply
35 mA (Max.)
Density
8M
Temperature, Operating
0 to +70 °C
Temperature, Operating, Maximum
70 °C
Temperature, Operating, Minimum
0 °C
Time, Access
100 ns
Time, Fall
≤20 ns
Time, Rise
≤20 ns
Voltage, Input, High
6 V
Voltage, Input, High Level
2 V (Min.)
Voltage, Input, Low
0.8 V
Voltage, Input, Low Level
0.80 V (Max.)
Voltage, Output, High
3.6 V (TTL), 4.3 V (CMOS)
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Access Time
45ns
Low Power Consumption
- Active current 35mA at 5 MHz - Standby current 100 μA
Programming Voltage
12.75 V ± 0.25 V
Memory Configuration
1M X 8
Supply Voltage Range
4.5V To 5V
Memory Case Style
DIP
No. Of Pins
32
Rohs Compliant
Yes
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1687-5

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Device description
2
2.1
2.2
2.3
8/24
Device description
The operating modes of the M27C801 are listed in the Operating Modes table. A single
power supply is required in Read mode. All inputs are TTL levels except for GV
on A9 for Electronic Signature and Margin Mode Set or Reset.
Table 2.
1. X = V
Read mode
The M27C801 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
available at the output after a delay of t
been low and the addresses have been stable for at least t
Standby mode
The M27C801 has a standby mode which reduces the supply current from 35mA to 100µA.
The M27C801 is placed in the standby mode by applying a CMOS high signal to the E input.
When in the standby mode, the outputs are in a high impedance state, independent of the
GV
Two-line output control
Because EPROMs are usually used in larger memory arrays, the product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
Read
Output Disable
Program
Program Inhibit
Standby
Electronic signature
PP
the lowest possible memory power dissipation,
complete assurance that output bus contention will not occur.
input.
IH
or V
Mode
Operating modes
IL
, V
ID
= 12 V ± 0.5 V.
AVQV
) is equal to the delay from E to output (t
(1)
V
IL
V
V
V
V
V
Pulse
E
IH
IH
IL
IL
IL
GLQV
from the falling edge of G, assuming that E has
GV
V
V
V
V
V
X
PP
PP
IH
IL
IL
pp
AVQV
-t
GLQV
V
A9
X
X
X
X
X
ID
.
ELQV
). Data is
PP
Data Out
Data In
Q7-Q0
Codes
M27C801
and 12V
Hi-Z
Hi-Z
Hi-Z

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