24LCS61/SN Microchip Technology, 24LCS61/SN Datasheet

no-image

24LCS61/SN

Manufacturer Part Number
24LCS61/SN
Description
IC EEPROM 1KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of 24LCS61/SN

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8)
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Device Selection Table
Features
• Low-power CMOS technology
• Software addressability allows up to 255 devices
• 2-wire serial interface bus, I
• Automatic bus arbitration
• Wakes up to control code 0110
• General purpose output pin can be used to enable
• 100 kHz and 400 kHz compatibility
• Page write buffer for up to 16 bytes
• 10 ms max write cycle time for byte or page write
• 1,000,000 erase/write cycles
• 8-pin PDIP, SOIC or TSSOP packages
• Temperature ranges supported:
Description
The Microchip Technology Inc. 24LCS61/62 is a 1K/2K
bit Serial EEPROM developed for applications that
require many devices on the same bus but do not have
the I/O pins required to address each one individually.
These devices contain an 8 bit address register that is
set upon power-up and allows the connection of up to
255 devices on the same bus. When the process of
assigning ID values to each device is in progress, the
device will automatically handle bus arbitration if more
than one device is operating on the bus. In addition, an
external open drain output pin is available that can be
used to enable other circuitry associated with each
individual
operation with typical standby and active currents of
only 10 A and 1 mA respectively. The device has a
page write capability for up to 16 bytes of data. The
device is available in the standard 8-pin PDIP, SOIC
(150 mil), and TSSOP packages.
I
 2004 Microchip Technology Inc.
2
C is a trademark of Philips Corporation.
24LCS51
24LCS62
- 1 mA active current typical
- 10 A standby current typical at 5.5V
on the same bus
other circuitry
- Industrial (I):
Device
1K/2K Software Addressable I
system.
1K bits
2K bits
Array
Size
Low
2.5V-5.5V
2.5V-5.5V
Voltage
Range
-40°C to +85°C
current
2
C compatible
Software Write
design permits
24LCS61/24LCS62
Entire Array
Protection
Lower Half
Package Types
Block Diagram
Pin Function Table
SOIC
TSSOP
V
PDIP
V
SDA SCL
CC
SS
2
Control
EDS
Logic
C
I/O
Name
SDA
EDS
SCL
V
V
NC
CC
SS
EDS
EDS
EDS
V
Vss
Vss
NC
NC
NC
NC
Obsolete Device
NC
NC
SS
Serial EEPROM
Memory
Control
Logic
1
2
3
4
1
2
3
4
Ground
Serial Data
Serial Clock
+2.5V to 5.5V Power Supply
No Internal Connection
External Device Select Output
1
2
3
4
XDEC
Function
8
7
6
5
8
7
6
5
8
7
6
5
Sense Amp.
R/W Control
HV Generator
DS21226E-page 1
Serial Number
ID Register
Vcc
NC
SCL
SDA
V
NC
SCL
SDA
EEPROM
CC
YDEC
Vcc
NC
SCL
SDA
Array

Related parts for 24LCS61/SN

24LCS61/SN Summary of contents

Page 1

... Temperature ranges supported: - Industrial (I): -40°C to +85°C Description The Microchip Technology Inc. 24LCS61/ 1K/2K bit Serial EEPROM developed for applications that require many devices on the same bus but do not have the I/O pins required to address each one individually. These devices contain an 8 bit address register that is set upon power-up and allows the connection 255 devices on the same bus ...

Page 2

... HYS CC V — . — ± — ± — OUT I Write — Read — — 50 CCS +1. Conditions Vss or Vcc Vss or Vcc OUT V = 5.0V (Note 25° MHz 5. 5.5V, SCL = 400 kHz 5.5V, SDA = SCL = EDS = V CC  2004 Microchip Technology Inc. ...

Page 3

... FIGURE 1-1: BUS TIMING DATA T F SCL Tsu:sta T LOW SDA STA SDA OUT  2004 Microchip Technology Inc. 24LCS61/24LCS62 Vcc = +2.5V to 5.5V Industrial (I -40°C to +85° 2.5V - 5.5V Vcc = 4.5V - 5.5V CC STD MODE FAST MODE Min. Max. Min. Max. — 100 — ...

Page 4

... When an overwrite does occur it will replace data in a first in first out fashion. (D) (D) DATA OR DATA ACKNOWLEDGE ALLOWED VALID TO CHANGE (C) (A) STOP CONDITION  2004 Microchip Technology Inc. ...

Page 5

... Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data.  2004 Microchip Technology Inc. 24LCS61/24LCS62 The device that acknowledges has to pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge related clock pulse ...

Page 6

... TABLE 4-1: Command Set Write Protection Fuse Read 14 different Write (Byte or Page) Assign Address Clear Address CONTROL BYTE FORMAT Command Select Bits ACK Acknowledge Bit COMMAND CODES Command Select Bits (C2 C1 C0) 000 001 010 100 110  2004 Microchip Technology Inc. ...

Page 7

...  2004 Microchip Technology Inc. 24LCS61/24LCS62 The 24LCS61/62 must acknowledge the control byte and the device ID byte, and the master must acknowl- edge each byte of the serial number transmitted by the device. As each bit is clocked out, each device will monitor the bus to detect if another device is also transmitting. If any device is outputting a logic ‘ ...

Page 8

... Off DS21226E-page CONTROL R O BYTE Device ID Byte Power Off Clear Address Command Unassigned State (ID byte not assigned yet) Assign Address Command: Device wins Arbitration Assign Address Command: Device loses Arbitration Assigned State (ID byte has been assigned)  2004 Microchip Technology Inc. ...

Page 9

... ID byte set to xxh edge any further bytes and will not (other than 00h) respond to the command.  2004 Microchip Technology Inc. 24LCS61/24LCS62 Result if Device Has Already Been Assigned an ID Byte Device will not acknowledge command. ...

Page 10

... The Stop bit of this command initiates an internal write cycle, and during this time the Acknowledge signals. ADDRESS DEVICE BYTE BYTE ID BYTE threshold detector CC 24LCS61/62 will not generate DATA  2004 Microchip Technology Inc. ...

Page 11

... FIGURE 6-2: PAGE WRITE S T BUS ACTIVITY CONTROL A MASTER BYTE R T SDA LINE BUS ACTIVITY FIGURE 6-3: SET WRITE PROTECTION COMMAND CONTROL R BYTE  2004 Microchip Technology Inc. 24LCS61/24LCS62 DEVICE ADDRESS DATA BYTE 0 ID BYTE BYTE ADDRESS DEVICE BYTE ID BYTE DATA BYTE ...

Page 12

... Figure 7-1 for flow diagram. DS21226E-page 12 FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control byte and Device ID byte Did Device Acknowledge Device ID (ACK = 0)? YES Next Operation  2004 Microchip Technology Inc. NO ...

Page 13

... SDA LINE BUS ACTIVITY OE Bit = EDS Pin Output Enable; see Section 9.0 “External Device Select (EDS) Pin and Output Enable (OE) Bit”  2004 Microchip Technology Inc. 24LCS61/24LCS62 After the ID byte and word address are sent, the master generates a Start condition following the acknowledge. ...

Page 14

... FIGURE 8-2: RANDOM READ S DEVICE CONTROL BYTE BYTE FIGURE 8-3: SEQUENTIAL READ BUS ACTIVITY ID MASTER BYTE SDA LINE BUS ACTIVITY DS21226E-page 14 S ADDRESS CONTROL T BYTE A BYTE DATA n DATA DATA DATA DEVICE S T BYTE ID BYTE DATA  2004 Microchip Technology Inc. ...

Page 15

... OE bit was set to a one in the control byte. If the OE bit is a zero and the previous command asserted it, then the EDS pin will be released by the device at this point.  2004 Microchip Technology Inc. 24LCS61/24LCS62 standard Read or Write commands, the EDS pin will pull low (providing that the OE bit is set high) on the ris- ing clock edge after the ack bit following the ID byte ...

Page 16

... APPENDIX A: REVISION HISTORY Revision D Corrections to Section 1.0, Electrical Characteristics. Revision E Add “Obsolete Device” to document header. DS21226E-page 16  2004 Microchip Technology Inc. ...

Page 17

... Links to other useful web sites related to Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events  2004 Microchip Technology Inc. 24LCS61/24LCS62 SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...

Page 18

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21226E-page 18 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS21226E  2004 Microchip Technology Inc. ...

Page 19

... The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  2004 Microchip Technology Inc. 24LCS61/24LCS62 XXX Pattern ...

Page 20

... NOTES: DS21226E-page 20  2004 Microchip Technology Inc. ...

Page 21

... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 22

... Via Salvatore Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Waegenburghtplein 4 NL-5152 JR, Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/12/04  2004 Microchip Technology Inc. ...

Related keywords