AT28C64B-15TC Atmel, AT28C64B-15TC Datasheet - Page 4
![IC EEPROM 64KBIT 150NS 28TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
AT28C64B-15TC
Manufacturer Part Number
AT28C64B-15TC
Description
IC EEPROM 64KBIT 150NS 28TSOP
Manufacturer
Atmel
Datasheet
1.AT28C64B-15JC.pdf
(20 pages)
Specifications of AT28C64B-15TC
Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
150ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT28C64B-15TC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
DC and AC Operating Range
Operating Modes
Notes:
4
Operating
Temperature (Case)
V
Mode
Read
Write
Standby/Write Inhibit
Write Inhibit
Write Inhibit
Output Disable
Chip Erase
CC
Power Supply
(2)
1. X can be V
2. See “AC Write Waveforms” on page 7.
3. V
AT28C64B
H
= 12.0 V 0.5 V.
IL
or V
Com.
Ind.
IH
.
tection Algorithms” on page 9.). After writing the 3-byte command sequence and waiting
t
that even after SDP is enabled, the user may still perform a byte or page write to the
AT28C64B by preceding the data to be written by the same 3-byte command sequence
used to enable SDP.
Once set, SDP remains active unless the disable command sequence is issued. Power
transitions do not disable SDP, and SDP protects the AT28C64B during power-up and
power-down conditions. All command sequences must conform to the page write timing
specifications. The data in the enable and disable command sequences is not actually
written into the device; their addresses may still be written with user data in either a byte
or page write operation.
After setting SDP, any attempt to write to the device without the 3-byte command
sequence will start the internal write timers. No data will be written to the device. How-
ever, for the duration of t
DEVICE IDENTIFICATION: An extra 64 bytes of EEPROM memory are available to the
user for device identification. By raising A9 to 12 V ±0.5 V and using address locations
1FC0H to 1FFFH, the additional bytes may be written to or read from in the same man-
ner as the regular memory array.
WC
, the entire AT28C64B will be protected against inadvertent writes. It should be noted
AT28C64B-15
-40°C - 85°C
0°C - 70°C
5 V 10%
CE
V
V
V
V
X
X
X
IH
IL
IL
IL
WC
, read operations will effectively be polling operations.
V
OE
V
V
V
X
V
X
H
IH
IH
IL
(1)
IL
(3)
AT28C64B-20
-40°C - 85°C
0°C - 70°C
5 V 10%
WE
V
V
V
V
X
X
X
IH
IL
IH
IL
AT28C64B-25
-40°C - 85°C
0°C - 70°C
5 V 10%
0270I–PEEPR–08/03
High Z
High Z
High Z
D
D
I/O
OUT
IN