AT29C512-12JC Atmel, AT29C512-12JC Datasheet - Page 3
![IC FLASH 512KBIT 120NS 32PLCC](/photos/7/21/72190/453-32-plcc_sml.jpg)
AT29C512-12JC
Manufacturer Part Number
AT29C512-12JC
Description
IC FLASH 512KBIT 120NS 32PLCC
Manufacturer
Atmel
Datasheet
1.AT29C512-70JC.pdf
(18 pages)
Specifications of AT29C512-12JC
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512K (64K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT29C51212JC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT29C512-12JC
Manufacturer:
AT
Quantity:
16
Part Number:
AT29C512-12JC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
3. Block Diagram
4. Device Operation
4.1
4.2
4.3
0456i–FLASH–9/08
Read
Byte Load
Program
The AT29C512 is accessed like an EPROM. When CE and OE are low and WE is high, the data
stored at the memory location determined by the address pins is asserted on the outputs. The
outputs are put in the high impedance state whenever CE or OE is high. This dual-line control
gives designers flexibility in preventing bus contention.
Byte loads are used to enter the 128 bytes of a sector to be programmed or the software codes
for data protection. A byte load is performed by applying a low pulse on the WE or CE input with
CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE or
WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.
The device is reprogrammed on a sector basis. If a byte of data within a sector is to be changed,
data for the entire sector must be loaded into the device. Any byte that is not loaded during the
programming of its sector will be indeterminate. Once the bytes of a sector are loaded into the
device, they are simultaneously programmed during the internal programming period. After the
first data byte has been loaded into the device, successive bytes are entered in the same man-
ner. Each new byte to be programmed must have its high-to-low transition on WE (or CE) within
150 µs of the low-to-high transition of WE (or CE) of the preceding byte. If a high-to-low transi-
tion is not detected within 150 µs of the last low-to-high transition, the load period will end and
the internal programming period will start. A7 to A15 specify the sector address. The sector
address must be valid during each high-to-low transition of WE (or CE). A0 to A6 specify the
byte address within the sector. The bytes may be loaded in any order; sequential loading is not
required. Once a programming operation has been initiated, and for the duration of t
operation will effectively be a polling operation.
AT29C512
WC
, a read
3