AT49F001-90PI Atmel, AT49F001-90PI Datasheet - Page 5
![IC FLASH 1MBIT 90NS 32DIP](/photos/7/21/72192/313-32-dip_sml.jpg)
AT49F001-90PI
Manufacturer Part Number
AT49F001-90PI
Description
IC FLASH 1MBIT 90NS 32DIP
Manufacturer
Atmel
Datasheet
1.AT49F001-55VC.pdf
(22 pages)
Specifications of AT49F001-90PI
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (128K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT49F00190PI
AT49F001(N(T)
BOOT BLOCK PROGRAMMING LOCKOUT OVERRIDE: The user can override the boot
block programming lockout by taking the RESET pin to 12 volts. By doing this, protected boot
block data can be altered through a chip erase, sector erase or word programming. When the
RESET pin is brought back to TTL levels the boot block programming lockout feature is again
active. This feature is not available on the AT49F001N(T).
PRODUCT IDENTIFICATION: The product identification mode identifies the device and man-
ufacturer as Atmel. It may be accessed by hardware or software operation. The hardware
operation mode can be used by an external programmer to identify the correct programming
algorithm for the Atmel product.
For details, see Operating Modes (for hardware operation) or Software Product Identification.
The manufacturer and device code is the same for both modes.
DATA POLLING: The AT49F001(N)(T) features DATA polling to indicate the end of a pro-
gram cycle. During a program cycle an attempted read of the last byte loaded will result in the
complement of the loaded data on I/O7. Once the program cycle has been completed, true
data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time
during the program cycle.
TOGGLE BIT: In addition to DATA polling the AT49F001(N)(T) provides another method for
determining the end of a program or erase cycle. During a program or erase operation, suc-
cessive attempts to read data from the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs
to the AT49F001(N)(T) in the following ways: (a) V
sense: if V
is below 3.8V (typical), the
CC
CC
program function is inhibited. (b) Program inhibit: holding any one of OE low, CE high or WE
high inhibits program cycles. (c) Noise filter: pulses of less than 15 ns (typical) on the WE or
CE inputs will not initiate a program cycle.
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