AT45DB081B-TI-2.5 Atmel, AT45DB081B-TI-2.5 Datasheet - Page 5

• Manufacturer Part Number: AT45DB081B-TI-2.5
• Description: IC FLASH 8MBIT 20MHZ 28TSOP
• Manufacturer: Atmel

Specifications of AT45DB081B-TI-2.5

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 8M (4096 pages x 264 bytes)
• Speed: 20MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Program and
Erase Commands
2225J–DFLSH–2/08
low and SCK is being toggled) starting again with bit 7. The data in the status register is con-
stantly updated, so each repeating sequence will output new data.
Status Register Format
Ready/Busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is
not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy
state. The user can continuously poll bit 7 of the status register by stopping SCK at a low level
once bit 7 has been output. The status of bit 7 will continue to be output on the SO pin, and once
the device is no longer busy, the state of SO will change from 0 to 1. There are eight operations
which can cause the device to be in a busy state: Main Memory Page to Buffer Transfer, Main
Memory Page to Buffer Compare, Buffer to Main Memory Page Program with Built-in Erase,
Buffer to Main Memory Page Program without Built-in Erase, Page Erase, Block Erase, Main
Memory Page Program, and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using
bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the
data in the buffer. If bit 6 is a 1, then at least one bit of the data in the main memory page does
not match the data in the buffer.
The device density is indicated using bits 5, 4, 3 and 2 of the status register. For the
AT45DB081B, the four bits are 1, 0, 0 and 1. The decimal value of these four binary bits does
not equate to the device density; the three bits represent a combinational code relating to differ-
ing densities of Serial DataFlash devices, allowing a total of sixteen different density
configurations.
BUFFER WRITE: Data can be shifted in from the SI pin into either buffer 1 or buffer 2. To load
data into either buffer, an 8-bit opcode, 84H for buffer 1 or 87H for buffer 2, must be followed by
15 don’t care bits and nine address bits (BFA8 - BFA0). The nine address bits specify the first
byte in the buffer to be written. The data is entered following the address bits. If the end of the
data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will
continue to be loaded into the buffer until a low-to-high transition is detected on the CS pin.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITH BUILT-IN ERASE: Data written into
either buffer 1 or buffer 2 can be programmed into the main memory. To start the operation, an
8-bit opcode, 83H for buffer 1 or 86H for buffer 2, must be followed by the three reserved bits, 12
address bits (PA11 - PA0) that specify the page in the main memory to be written, and nine addi-
tional don’t care bits. When a low-to-high transition occurs on the CS pin, the part will first erase
the selected page in main memory to all 1s and then program the data stored in the buffer into
the specified page in the main memory. Both the erase and the programming of the page are
internally self-timed and should take place in a maximum time of t
register will indicate that the part is busy.
BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE: A previously
erased page within main memory can be programmed with the contents of either buffer 1 or
buffer 2. To start the operation, an 8-bit opcode, 88H for buffer 1 or 89H for buffer 2, must be fol-
lowed by the three reserved bits, 12 address bits (PA11 - PA0) that specify the page in the main
memory to be written, and nine additional don’t care bits. When a low-to-high transition occurs
on the CS pin, the part will program the data stored in the buffer into the specified page in the
main memory. It is necessary that the page in main memory that is being programmed has been
previously erased. The programming of the page is internally self-timed and should take place in
a maximum time of t
RDY/BUSY
Bit 7
COMP
Bit 6
P
. During this time, the status register will indicate that the part is busy.
Bit 5
1
Bit 4
0
Bit 3
0
Bit 2
1
EP
. During this time, the status
Bit 1
AT45DB081B
X
Bit 0
X
5