AT45DB161B-TI-2.5 Atmel, AT45DB161B-TI-2.5 Datasheet - Page 6

• Manufacturer Part Number: AT45DB161B-TI-2.5
• Description: IC FLASH 16MBIT 20MHZ 28TSOP
• Manufacturer: Atmel

Specifications of AT45DB161B-TI-2.5

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (4096 pages x 528 bytes)
• Speed: 20MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Block Erase Addressing
6
PA11
0
0
0
0
1
1
1
1
•
•
•
AT45DB161B
PA10
0
0
0
0
1
1
1
1
•
•
•
PA9
0
0
0
0
1
1
1
1
•
•
•
PA8
0
0
0
0
1
1
1
1
•
•
•
BUFFER TO MAIN MEMORY PAGE PROGRAM WITHOUT BUILT-IN ERASE: A
previously erased page within main memory can be programmed with the contents of
either buffer 1 or buffer 2. To start the operation, an 8-bit opcode, 88H for buffer 1 or
89H for buffer 2, must be followed by the two reserved bits, 12 address bits
(PA11 - PA0) that specify the page in the main memory to be written, and ten additional
don’t care bits. When a low-to-high transition occurs on the CS pin, the part will program
the data stored in the buffer into the specified page in the main memory. It is necessary
that the page in main memory that is being programmed has been previously erased.
The programming of the page is internally self-timed and should take place in a maxi-
mum time of t
Successive page programming operations without doing a page erase are not recom-
mended. In other words, changing bytes within a page from a “1” to a “0” during multiple
page programming operations without erasing that page is not recommended.
PAGE ERASE: The optional Page Erase command can be used to individually erase
any page in the main memory array allowing the Buffer to Main Memory Page Program
without Built-in Erase command to be utilized at a later time. To perform a Page Erase,
an opcode of 81H must be loaded into the device, followed by two reserved bits,
12 address bits (PA11 - PA0), and ten don’t care bits. The 12 address bits are used to
specify which page of the memory array is to be erased. When a low-to-high transition
occurs on the CS pin, the part will erase the selected page to 1s. The erase operation is
internally self-timed and should take place in a maximum time of t
the status register will indicate that the part is busy.
BLOCK ERASE: A block of eight pages can be erased at one time allowing the Buffer
to Main Memory Page Program without Built-in Erase command to be utilized to reduce
programming times when writing large amounts of data to the device. To perform a
Block Erase, an opcode of 50H must be loaded into the device, followed by two
reserved bits, nine address bits (PA11 - PA3), and 13 don’t care bits. The nine address
bits are used to specify which block of eight pages is to be erased. When a low-to-high
transition occurs on the CS pin, the part will erase the selected block of eight pages to
1s. The erase operation is internally self-timed and should take place in a maximum
time of t
PA7
0
0
0
0
1
1
1
1
•
•
•
BE
. During this time, the status register will indicate that the part is busy.
P
. During this time, the status register will indicate that the part is busy.
PA6
0
0
0
0
1
1
1
1
•
•
•
PA5
0
0
0
0
1
1
1
1
•
•
•
PA4
0
0
1
1
0
0
1
1
•
•
•
PA3
0
1
0
1
0
1
0
1
•
•
•
PA2
X
X
X
X
X
X
X
X
•
•
•
PA1
X
X
X
X
X
X
X
X
•
•
•
PE
. During this time,
PA0
2224I–DFLSH–10/04
X
X
X
X
X
X
X
X
•
•
•
Block
508
509
510
511
0
1
2
3
•
•
•