AT25256A-10CI-1.8 Atmel, AT25256A-10CI-1.8 Datasheet
AT25256A-10CI-1.8
Specifications of AT25256A-10CI-1.8
Related parts for AT25256A-10CI-1.8
AT25256A-10CI-1.8 Summary of contents
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... GND GND Bottom View 8-lead PDIP 8-lead SOIC VCC HOLD SCK WP GND GND SPI Serial EEPROMs 128K (16,384 x 8) 256K (32,768 x 8) AT25128A AT25256A Preliminary 1 8 VCC 2 7 HOLD 3 6 SCK VCC 2 7 HOLD 3 6 SCK Rev. 3368D–SEEPR–6/04 1 ...
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Absolute Maximum Ratings* Operating Temperature.................................. - +125 C Storage Temperature ..................................... - +150 C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Block ...
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Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from - +125 +1.8V to +5.5V(unless otherwise noted Symbol Parameter V Supply ...
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... Hold to Output Low Hold to Output High Output Disable Time DIS t Write Cycle Time WC (1) Endurance 5.0V Page Mode Note: 1. This parameter is characterized and is not 100% tested. Contact Atmel for further information. AT25128A/256A [Preliminary - - +125 Voltage Min 4.5 - 5.5 20 2.7 - 5.5 40 1 ...
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Serial Interface MASTER: The device that generates the serial clock. Description SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25128A/256A always operates as a slave. TRANSMITTER/RECEIVER: The AT25128A/256A has seperate pins designated for data transmission (SO) ...
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SPI Serial Interface AT25128A/256A [Preliminary] 6 AT25128A/256A 3368D–SEEPR–6/04 ...
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... Bit 7 (WPEN) See Table 5. Bits are 1s during an internal write cycle. Operation Set Write Enable Latch Reset Write Enable Latch Read Status Register Write Status Register Read Data from Memory Array Write Data to Memory Array Bit 4 Bit 3 Bit 2 Bit 1 X BP1 BP0 WEN ...
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... Protected Unprotected Blocks Blocks Protected Protected Protected Writable Protected Protected Protected Writable Protected Protected Protected Writable AT25256A None 6000 - 7FFF 4000 - 7FFF 0000 - 7FFF Status Register Protected Writable Protected Protected Protected Writable 3368D–SEEPR–6/04 ...
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... NOTE: If the device is not Write enabled (WREN), the device will ignore the Write instruction and will return to the standby state, when CS is brought high. A new CS fall- ing edge is required to re-initiate the serial communication. Table 6. Address Key 3368D–SEEPR–6/04 AT25128A/256A [Preliminary] Address AT25128A Don’t Care Bits A AT25256A - ...
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Timing Diagrams (for SPI Mode 0 (0, 0)) Synchronous Data Timing CSS V IH SCK HI WREN Timing WRDI Timing AT25128A/256A [Preliminary] ...
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RDSR Timing CS 0 SCK SI INSTRUCTION HIGH IMPEDANCE SO WRSR Timing READ Timing 3368D–SEEPR–6/04 AT25128A/256A [Preliminary MSB DATA OUT ...
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WRITE Timing HOLD Timing CS SCK HOLD SO AT25128A/256A [Preliminary 3368D–SEEPR–6/04 ...
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AT25128A Ordering Information Ordering Code AT25128A-10PI-2.7 AT25128AN-10SI-2.7 AT25128AW-10SI-2.7 AT25128AU2-10UI-2.7 AT25128A-10TI-2.7 AT25128A-10PI-1.8 AT25128AN-10SI-1.8 AT25128AW-10SI-1.8 AT25128AU2-10UI-1.8 AT25128A-10TI-1.8 AT25128AN-10SU-2.7 AT25128AN-10SU-1.8 AT25128A-10TU-2.7 AT25128A-10TU-1.8 AT25128AN-10SE-2.7 AT25128AN-10SQ-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC ...
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... Low-voltage (2.7V to 5.5V) -1.8 Low-voltage (1.8V to 5.5V) AT25256A Ordering Information Ordering Code AT25256A-10PI-2.7 AT25256AN-10SI-2.7 AT25256AW-10SI-2.7 AT25256AU2-10UI-2.7 AT25256A-10TI-2.7 AT25256A-10PI-1.8 AT25256AN-10SI-1.8 AT25256AW-10SI-1.8 AT25256AU2-10UI-1.8 AT25256A-10TI-1.8 AT25256AN-10SU-2.7 AT25256AN-10SU-1.8 AT25256A-10TU-2.7 AT25256A-10TU-1.8 AT25256AN-10SE-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. ...
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Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...
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JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...
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EIAJ SOIC 1 N Top View e D Side View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs ...
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A1 BALL PAD CORNER e (e1) 1. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT25128A/256A [Preliminary] 18 ...
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TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...
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