AT29LV512-12TI Atmel, AT29LV512-12TI Datasheet - Page 3

• Manufacturer Part Number: AT29LV512-12TI
• Description: IC FLASH 512KBIT 120NS 32TSOP
• Manufacturer: Atmel

Specifications of AT29LV512-12TI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 512K (64K x 8)
• Speed: 120ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3. Block Diagram
4. Device Operation
4.1
4.2
0177O–FLASH–9/08
Read
Software Data Protection Programming
The AT29LV512 is accessed like an EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the address pins is asserted on the outputs.
The outputs are put in the high impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus contention.
The AT29LV512 has 512 individual sectors, each 128 bytes. Using the software data protection
feature, byte loads are used to enter the 128 bytes of a sector to be programmed. The
AT29LV512 can only be programmed or reprogrammed using the software data protection fea-
ture. The device is programmed on a sector basis. If a byte of data within the sector is to be
changed, data for the entire 128-byte sector must be loaded into the device. The AT29LV512
automatically does a sector erase prior to loading the data into the sector. An erase command is
not required.
Software data protection protects the device from inadvertent programming. A series of three
program commands to specific addresses with specific data must be presented to the device
before programming may occur. After writing the three-byte command sequence (and after t
the entire device is protected. The same three program commands must begin each program
operation. All software program commands must obey the sector program timing specifications.
Power transitions will not reset the software data protection feature; however, the software fea-
ture will guard against inadvertent program cycles during power transitions.
Any attempt to write to the device without the 3-byte command sequence will start the internal
write timers. No data will be written to the device; however, for the duration of t
tion will effectively be a polling operation.
After the software data protection’s 3-byte command code is given, a byte load is performed by
applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high. The
address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by
the first rising edge of CE or WE.
AT29LV512
WC
, a read opera-
WC
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3