AT49BV6416-70TI Atmel, AT49BV6416-70TI Datasheet - Page 6

• Manufacturer Part Number: AT49BV6416-70TI
• Description: IC FLASH 64MBIT 70NS 48TSOP
• Manufacturer: Atmel

Specifications of AT49BV6416-70TI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 64M (4M x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.8
3.8.1
3.8.2
6
Program/Erase Status
AT49BV6416(T)
Data Polling
Toggle Bit
Table 3-2.
The device provides several bits to determine the status of a program or erase operation: I/O2,
I/O3, I/O5, I/O6, and I/O7. All other status bits are don’t care. The
and the following four sections describe the function of these bits. To provide greater flexibility
for system designers, the AT49BV6416(T) contains a programmable configuration register. The
configuration register allows the user to specify the status bit operation. The configuration regis-
ter can be set to one of two different values, “00” or “01”. If the configuration register is set to
“00”, the part will automatically return to the read mode after a successful program or erase
operation. If the configuration register is set to a “01”, a Product ID Exit command must be given
after a successful program or erase operation before the part will return to the read mode. It is
important to note that whether the configuration register is set to a “00” or to a “01”, any unsuc-
cessful program or erase operation requires using the Product ID Exit command to return the
device to read mode. The default value (after power-up) for the configuration register is “00”.
Using the four-bus cycle set configuration register command as shown in the
tion Table” on page
to the reset pin will not alter the value of the configuration register. The value of the configuration
register will affect the operation of the I/O7 status bit as described below.
The AT49BV6416(T) features Data Polling to indicate the end of a program cycle. If the status
configuration register is set to a “00”, during a program cycle an attempted read of the last word
loaded will result in the complement of the loaded data on I/O7. Once the program cycle has
been completed, true data is valid on all outputs and the next cycle may begin. During a chip or
sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the program
or erase cycle has completed, true data will be read from the device. Data Polling may begin at
any time during the program cycle. Please see
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has completed
a program or erase operation. Once I/O7 has gone high, status information on the other pins can
be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
bit as shown in the algorithm in
In addition to Data Polling, the AT49BV6416(T) provides another method for determining the
end of a program or erase cycle. During a program or erase operation, successive attempts to
read data from the memory will result in I/O6 toggling between one and zero. Once the program
cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit
may begin at any time during a program cycle. Please see
more details.
I/O1
0
0
1
1
Sector Protection Status
12, the value of the configuration register can be changed. Voltages applied
Figures 3-2 and 3-3
I/O0
0
1
0
1
Sector Protection Status
Sector Not Locked
Softlock Enabled
Hardlock Enabled
Both Hardlock and Softlock Enabled
“Status Bit Table” on page 11
on
page
9.
“Status Bit Table” on page 11
“Status Bit Table” on page 11
for more details.
“Command Defini-
3451D–FLASH–04/06
PP
status
for